diff options
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/llround-conv-fp16.ll | 32 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll | 33 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/lround-conv-fp16.ll | 32 |
3 files changed, 97 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/llround-conv-fp16.ll b/llvm/test/CodeGen/AArch64/llround-conv-fp16.ll new file mode 100644 index 00000000000..5c914c09361 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/llround-conv-fp16.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s + +; CHECK-LABEL: testmhhs: +; CHECK: fcvtas x0, h0 +; CHECK: ret +define i16 @testmhhs(half %x) { +entry: + %0 = tail call i64 @llvm.llround.i64.f16(half %x) + %conv = trunc i64 %0 to i16 + ret i16 %conv +} + +; CHECK-LABEL: testmhws: +; CHECK: fcvtas x0, h0 +; CHECK: ret +define i32 @testmhws(half %x) { +entry: + %0 = tail call i64 @llvm.llround.i64.f16(half %x) + %conv = trunc i64 %0 to i32 + ret i32 %conv +} + +; CHECK-LABEL: testmhxs: +; CHECK: fcvtas x0, h0 +; CHECK-NEXT: ret +define i64 @testmhxs(half %x) { +entry: + %0 = tail call i64 @llvm.llround.i64.f16(half %x) + ret i64 %0 +} + +declare i64 @llvm.llround.i64.f16(half) nounwind readnone diff --git a/llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll b/llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll new file mode 100644 index 00000000000..5eabc2a4f46 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll @@ -0,0 +1,33 @@ +; RUN: llc < %s -mtriple=aarch64-windows -mattr=+fullfp16 | FileCheck %s + +; CHECK-LABEL: testmhhs: +; CHECK: fcvtas w0, h0 +; CHECK: ret +define i16 @testmhhs(half %x) { +entry: + %0 = tail call i32 @llvm.lround.i32.f16(half %x) + %conv = trunc i32 %0 to i16 + ret i16 %conv +} + +; CHECK-LABEL: testmhws: +; CHECK: fcvtas w0, h0 +; CHECK: ret +define i32 @testmhws(half %x) { +entry: + %0 = tail call i32 @llvm.lround.i32.f16(half %x) + ret i32 %0 +} + +; CHECK-LABEL: testmhxs: +; CHECK: fcvtas w8, h0 +; CHECK-NEXT: sxtw x0, w8 +; CHECK-NEXT: ret +define i64 @testmhxs(half %x) { +entry: + %0 = tail call i32 @llvm.lround.i32.f16(half %x) + %conv = sext i32 %0 to i64 + ret i64 %conv +} + +declare i32 @llvm.lround.i32.f16(half) nounwind readnone diff --git a/llvm/test/CodeGen/AArch64/lround-conv-fp16.ll b/llvm/test/CodeGen/AArch64/lround-conv-fp16.ll new file mode 100644 index 00000000000..cf81047f65e --- /dev/null +++ b/llvm/test/CodeGen/AArch64/lround-conv-fp16.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s + +; CHECK-LABEL: testmhhs: +; CHECK: fcvtas x0, h0 +; CHECK: ret +define i16 @testmhhs(half %x) { +entry: + %0 = tail call i64 @llvm.lround.i64.f16(half %x) + %conv = trunc i64 %0 to i16 + ret i16 %conv +} + +; CHECK-LABEL: testmhws: +; CHECK: fcvtas x0, h0 +; CHECK: ret +define i32 @testmhws(half %x) { +entry: + %0 = tail call i64 @llvm.lround.i64.f16(half %x) + %conv = trunc i64 %0 to i32 + ret i32 %conv +} + +; CHECK-LABEL: testmhxs: +; CHECK: fcvtas x0, h0 +; CHECK-NEXT: ret +define i64 @testmhxs(half %x) { +entry: + %0 = tail call i64 @llvm.lround.i64.f16(half %x) + ret i64 %0 +} + +declare i64 @llvm.lround.i64.f16(half) nounwind readnone |
