diff options
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/ARM/debug-info-qreg.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/debug-info-s16-reg.ll | 3 | ||||
| -rw-r--r-- | llvm/test/DebugInfo/X86/subreg.ll | 3 |
3 files changed, 4 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/ARM/debug-info-qreg.ll b/llvm/test/CodeGen/ARM/debug-info-qreg.ll index 586364192c4..03a7e4b1bf1 100644 --- a/llvm/test/CodeGen/ARM/debug-info-qreg.ll +++ b/llvm/test/CodeGen/ARM/debug-info-qreg.ll @@ -2,13 +2,11 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target triple = "thumbv7-apple-macosx10.6.7" -;CHECK: sub-register -;CHECK-NEXT: DW_OP_regx +;CHECK: sub-register DW_OP_regx ;CHECK-NEXT: ascii ;CHECK-NEXT: DW_OP_piece ;CHECK-NEXT: byte 8 -;CHECK-NEXT: sub-register -;CHECK-NEXT: DW_OP_regx +;CHECK-NEXT: sub-register DW_OP_regx ;CHECK-NEXT: ascii ;CHECK-NEXT: DW_OP_piece ;CHECK-NEXT: byte 8 diff --git a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll index 814055b05e9..54c38a751d2 100644 --- a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll +++ b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll @@ -1,8 +1,7 @@ ; RUN: llc < %s - | FileCheck %s ; Radar 9309221 ; Test dwarf reg no for s16 -;CHECK: super-register -;CHECK-NEXT: DW_OP_regx +;CHECK: super-register DW_OP_regx ;CHECK-NEXT: ascii ;CHECK-NEXT: DW_OP_piece ;CHECK-NEXT: 4 diff --git a/llvm/test/DebugInfo/X86/subreg.ll b/llvm/test/DebugInfo/X86/subreg.ll index 6ba435015ef..a9a566cb077 100644 --- a/llvm/test/DebugInfo/X86/subreg.ll +++ b/llvm/test/DebugInfo/X86/subreg.ll @@ -3,8 +3,7 @@ ; We are testing that a value in a 16 bit register gets reported as ; being in its superregister. -; CHECK: .byte 80 # super-register -; CHECK-NEXT: # DW_OP_reg0 +; CHECK: .byte 80 # super-register DW_OP_reg0 ; CHECK-NEXT: .byte 147 # DW_OP_piece ; CHECK-NEXT: .byte 2 # 2 |
