diff options
Diffstat (limited to 'llvm/test')
27 files changed, 44 insertions, 45 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-2012-06-06-FPToUI.ll b/llvm/test/CodeGen/AArch64/arm64-2012-06-06-FPToUI.ll index 168e921bcc0..7d880f300bb 100644 --- a/llvm/test/CodeGen/AArch64/arm64-2012-06-06-FPToUI.ll +++ b/llvm/test/CodeGen/AArch64/arm64-2012-06-06-FPToUI.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=arm64 -O0 < %s | FileCheck %s -; RUN: llc -march=arm64 -O3 < %s | FileCheck %s +; RUN: llc -march=arm64 -O0 -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -march=arm64 -O3 -verify-machineinstrs < %s | FileCheck %s @.str = private unnamed_addr constant [9 x i8] c"%lf %lu\0A\00", align 1 @.str1 = private unnamed_addr constant [8 x i8] c"%lf %u\0A\00", align 1 diff --git a/llvm/test/CodeGen/AArch64/arm64-EXT-undef-mask.ll b/llvm/test/CodeGen/AArch64/arm64-EXT-undef-mask.ll index 1b2d54317c2..1bb47fc00b2 100644 --- a/llvm/test/CodeGen/AArch64/arm64-EXT-undef-mask.ll +++ b/llvm/test/CodeGen/AArch64/arm64-EXT-undef-mask.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s +; RUN: llc -O0 -march=arm64 -aarch64-neon-syntax=apple -verify-machineinstrs < %s | FileCheck %s ; The following 2 test cases test shufflevector with beginning UNDEF mask. define <8 x i16> @test_vext_undef_traverse(<8 x i16> %in) { diff --git a/llvm/test/CodeGen/AArch64/arm64-abi.ll b/llvm/test/CodeGen/AArch64/arm64-abi.ll index b48e3574756..389f10f3b12 100644 --- a/llvm/test/CodeGen/AArch64/arm64-abi.ll +++ b/llvm/test/CodeGen/AArch64/arm64-abi.ll @@ -1,7 +1,6 @@ -; RUN: llc < %s -march=arm64 -mcpu=cyclone -enable-misched=false | FileCheck %s -; RUN: llc < %s -O0 | FileCheck -check-prefix=FAST %s +; RUN: llc -mtriple=arm64-apple-darwin -mcpu=cyclone -enable-misched=false < %s | FileCheck %s +; RUN: llc -O0 -mtriple=arm64-apple-darwin < %s | FileCheck --check-prefix=FAST %s ; REQUIRES: asserts -target triple = "arm64-apple-darwin" ; rdar://9932559 define i64 @i8i16callee(i64 %a1, i64 %a2, i64 %a3, i8 signext %a4, i16 signext %a5, i64 %a6, i64 %a7, i64 %a8, i8 signext %b1, i16 signext %b2, i8 signext %b3, i8 signext %b4) nounwind readnone noinline { diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-addr-offset.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-addr-offset.ll index ebd847e0f72..d81bc7cee11 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-addr-offset.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-addr-offset.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s @sortlist = common global [5001 x i32] zeroinitializer, align 16 @sortlist2 = common global [5001 x i64] zeroinitializer, align 16 diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll index 1706e9eba2b..34394b2af0a 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-alloca.ll @@ -1,5 +1,5 @@ ; This test should cause the TargetMaterializeAlloca to be invoked -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s %struct.S1Ty = type { i64 } %struct.S2Ty = type { %struct.S1Ty, %struct.S1Ty } diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-br.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-br.ll index 7885a6251b8..09e449c7433 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-br.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-br.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -mcpu=cyclone | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -mcpu=cyclone -verify-machineinstrs < %s | FileCheck %s define void @branch1() nounwind uwtable ssp { %x = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll index 34a227a9dc0..6e22fcf7dc7 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll @@ -1,6 +1,6 @@ -; RUN: llc -O0 -fast-isel-abort -fast-isel-abort-args -code-model=small -mtriple=arm64-apple-darwin < %s | FileCheck %s -; RUN: llc -O0 -fast-isel-abort -fast-isel-abort-args -code-model=large -mtriple=arm64-apple-darwin < %s | FileCheck %s --check-prefix=LARGE -; RUN: llc -O0 -fast-isel-abort -fast-isel-abort-args -code-model=small -mtriple=aarch64_be-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-BE +; RUN: llc -O0 -fast-isel-abort -fast-isel-abort-args -code-model=small -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -fast-isel-abort-args -code-model=large -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s --check-prefix=LARGE +; RUN: llc -O0 -fast-isel-abort -fast-isel-abort-args -code-model=small -verify-machineinstrs -mtriple=aarch64_be-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-BE define void @call0() nounwind { entry: diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll index ca8ab2cb504..a6c7bef3725 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -mcpu=cyclone | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin -mcpu=cyclone < %s | FileCheck %s ;; Test various conversions. define zeroext i32 @trunc_(i8 zeroext %a, i16 zeroext %b, i32 %c, i64 %d) nounwind ssp { diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll index f0305962076..de101f2665e 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-fcmp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s define zeroext i1 @fcmp_float1(float %a) nounwind ssp { entry: diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll index dc4d8953c27..78a4717c9a0 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s ; Test load/store of global value from global offset table. @seed = common global i64 0, align 8 diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll index e0d7d413166..2d60783cd1c 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll @@ -1,4 +1,4 @@ -; RUN: llc -O0 -fast-isel-abort -mtriple=arm64-apple-darwin < %s | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s define i32 @icmp_eq_imm(i32 %a) nounwind ssp { entry: diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-indirectbr.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-indirectbr.ll index 70335ace50c..a5f45249678 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-indirectbr.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-indirectbr.ll @@ -1,10 +1,10 @@ -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s @fn.table = internal global [2 x i8*] [i8* blockaddress(@fn, %ZERO), i8* blockaddress(@fn, %ONE)], align 8 define i32 @fn(i32 %target) nounwind { entry: -; CHECK: @fn +; CHECK-LABEL: fn %retval = alloca i32, align 4 %target.addr = alloca i32, align 4 store i32 %target, i32* %target.addr, align 4 @@ -29,8 +29,8 @@ return: ; preds = %ONE, %ZERO ret i32 %2 indirectgoto: ; preds = %entry -; CHECK: ldr x0, [sp] -; CHECK: br x0 +; CHECK: ldr [[REG:x[0-9]+]], [sp] +; CHECK-NEXT: br [[REG]] %indirect.goto.dest = phi i8* [ %1, %entry ] indirectbr i8* %indirect.goto.dest, [label %ZERO, label %ONE] } diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll index b16c899f421..9ac3e443183 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios | FileCheck %s --check-prefix=ARM64 +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios < %s | FileCheck %s --check-prefix=ARM64 @message = global [80 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 16 @temp = common global [80 x i8] zeroinitializer, align 16 diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-noconvert.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-noconvert.ll index 483d1799f9c..81daa7c1d5a 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-noconvert.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-noconvert.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=arm64-apple-ios -O0 %s -o - | FileCheck %s +; RUN: llc -O0 -verify-machineinstrs -mtriple=aarch64-apple-ios < %s | FileCheck %s ; Fast-isel can't do vector conversions yet, but it was emitting some highly ; suspect UCVTFUWDri MachineInstrs. diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-rem.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-rem.ll index d5bdbaae9e7..5781a602101 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-rem.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-rem.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s ; RUN: llc %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -print-machineinstrs=expand-isel-pseudos -o /dev/null 2> %t ; RUN: FileCheck %s < %t --check-prefix=CHECK-SSA ; REQUIRES: asserts diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-ret.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-ret.ll index d91fd285d55..f84c75504f6 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-ret.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-ret.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s ;; Test returns. define void @t0() nounwind ssp { diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-select.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-select.ll index c8a997e9a81..1bd4d05454f 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-select.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-select.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -verify-machineinstrs < %s | FileCheck %s define i32 @t1(i32 %c) nounwind readnone { entry: diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-store.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-store.ll index 362224fd0ca..9494d555301 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-store.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-store.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s -; RUN: llc -mtriple=aarch64-unknown-unknown -fast-isel -fast-isel-abort < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-unknown-unknown -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-unknown-unknown -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s define void @store_i8(i8* %a) { ; CHECK-LABEL: store_i8 diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel.ll index a71bdb2a3df..d3b7e67a315 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s +; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s define void @t0(i32 %a) nounwind { entry: diff --git a/llvm/test/CodeGen/AArch64/arm64-xaluo.ll b/llvm/test/CodeGen/AArch64/arm64-xaluo.ll index 71300c4dd2c..d23eb877b99 100644 --- a/llvm/test/CodeGen/AArch64/arm64-xaluo.ll +++ b/llvm/test/CodeGen/AArch64/arm64-xaluo.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=arm64 -aarch64-atomic-cfg-tidy=0 < %s | FileCheck %s -; RUN: llc -march=arm64 -aarch64-atomic-cfg-tidy=0 -fast-isel -fast-isel-abort < %s | FileCheck %s +; RUN: llc -march=arm64 -aarch64-atomic-cfg-tidy=0 -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -march=arm64 -aarch64-atomic-cfg-tidy=0 -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s ; ; Get the actual value of the overflow bit. diff --git a/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll b/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll index 11b95f92bf2..b950a24f558 100644 --- a/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll +++ b/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=aarch64-apple-darwin < %s | FileCheck %s --check-prefix=CHECK --check-prefix=SDAG -; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FAST +; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK --check-prefix=SDAG +; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FAST ; Load / Store Base Register only define zeroext i1 @load_breg_i1(i1* %a) { diff --git a/llvm/test/CodeGen/AArch64/fast-isel-branch_weights.ll b/llvm/test/CodeGen/AArch64/fast-isel-branch_weights.ll index f96fff18d03..5b224760460 100644 --- a/llvm/test/CodeGen/AArch64/fast-isel-branch_weights.ll +++ b/llvm/test/CodeGen/AArch64/fast-isel-branch_weights.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=arm64-apple-darwin -aarch64-atomic-cfg-tidy=0 < %s | FileCheck %s -; RUN: llc -mtriple=arm64-apple-darwin -aarch64-atomic-cfg-tidy=0 -fast-isel -fast-isel-abort < %s | FileCheck %s +; RUN: llc -mtriple=arm64-apple-darwin -aarch64-atomic-cfg-tidy=0 -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=arm64-apple-darwin -aarch64-atomic-cfg-tidy=0 -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s ; Test if the BBs are reordred according to their branch weights. define i64 @branch_weights_test(i64 %a, i64 %b) { diff --git a/llvm/test/CodeGen/AArch64/fast-isel-call-return.ll b/llvm/test/CodeGen/AArch64/fast-isel-call-return.ll index 22cb35d99ab..9b10969417d 100644 --- a/llvm/test/CodeGen/AArch64/fast-isel-call-return.ll +++ b/llvm/test/CodeGen/AArch64/fast-isel-call-return.ll @@ -1,4 +1,4 @@ -; RUN: llc -fast-isel -fast-isel-abort < %s | FileCheck %s +; RUN: llc -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" target triple = "aarch64-linux-gnu" diff --git a/llvm/test/CodeGen/AArch64/fast-isel-mul.ll b/llvm/test/CodeGen/AArch64/fast-isel-mul.ll index d02c67f52f8..88a3ee8db3d 100644 --- a/llvm/test/CodeGen/AArch64/fast-isel-mul.ll +++ b/llvm/test/CodeGen/AArch64/fast-isel-mul.ll @@ -1,4 +1,4 @@ -; RUN: llc -fast-isel -fast-isel-abort -mtriple=aarch64 -o - %s | FileCheck %s +; RUN: llc -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=aarch64 < %s | FileCheck %s @var8 = global i8 0 @var16 = global i16 0 @@ -7,7 +7,7 @@ define void @test_mul8(i8 %lhs, i8 %rhs) { ; CHECK-LABEL: test_mul8: -; CHECK: mul w0, w0, w1 +; CHECK: mul {{w[0-9]+}}, w0, w1 ; %lhs = load i8* @var8 ; %rhs = load i8* @var8 %prod = mul i8 %lhs, %rhs @@ -17,7 +17,7 @@ define void @test_mul8(i8 %lhs, i8 %rhs) { define void @test_mul16(i16 %lhs, i16 %rhs) { ; CHECK-LABEL: test_mul16: -; CHECK: mul w0, w0, w1 +; CHECK: mul {{w[0-9]+}}, w0, w1 %prod = mul i16 %lhs, %rhs store i16 %prod, i16* @var16 ret void @@ -25,7 +25,7 @@ define void @test_mul16(i16 %lhs, i16 %rhs) { define void @test_mul32(i32 %lhs, i32 %rhs) { ; CHECK-LABEL: test_mul32: -; CHECK: mul w0, w0, w1 +; CHECK: mul {{w[0-9]+}}, w0, w1 %prod = mul i32 %lhs, %rhs store i32 %prod, i32* @var32 ret void @@ -33,7 +33,7 @@ define void @test_mul32(i32 %lhs, i32 %rhs) { define void @test_mul64(i64 %lhs, i64 %rhs) { ; CHECK-LABEL: test_mul64: -; CHECK: mul x0, x0, x1 +; CHECK: mul {{x[0-9]+}}, x0, x1 %prod = mul i64 %lhs, %rhs store i64 %prod, i64* @var64 ret void diff --git a/llvm/test/CodeGen/AArch64/fast-isel-shift.ll b/llvm/test/CodeGen/AArch64/fast-isel-shift.ll index 8f670b4ba20..9b71930ea06 100644 --- a/llvm/test/CodeGen/AArch64/fast-isel-shift.ll +++ b/llvm/test/CodeGen/AArch64/fast-isel-shift.ll @@ -1,4 +1,4 @@ -; RUN: llc -fast-isel -fast-isel-abort -mtriple=arm64-apple-darwin < %s | FileCheck %s +; RUN: llc -fast-isel -fast-isel-abort -mtriple=arm64-apple-darwin -verify-machineinstrs < %s | FileCheck %s ; CHECK-LABEL: lsl_i8 ; CHECK: ubfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #4 diff --git a/llvm/test/CodeGen/AArch64/fast-isel-sqrt.ll b/llvm/test/CodeGen/AArch64/fast-isel-sqrt.ll index 44ad8eab369..1331d5c7de5 100644 --- a/llvm/test/CodeGen/AArch64/fast-isel-sqrt.ll +++ b/llvm/test/CodeGen/AArch64/fast-isel-sqrt.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=arm64-apple-darwin < %s | FileCheck %s -; RUN: llc -mtriple=arm64-apple-darwin -fast-isel -fast-isel-abort < %s | FileCheck %s +; RUN: llc -mtriple=arm64-apple-darwin -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=arm64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s define float @test_sqrt_f32(float %a) { ; CHECK-LABEL: test_sqrt_f32 diff --git a/llvm/test/CodeGen/AArch64/frameaddr.ll b/llvm/test/CodeGen/AArch64/frameaddr.ll index ff9916c156b..d6bb50e57a7 100644 --- a/llvm/test/CodeGen/AArch64/frameaddr.ll +++ b/llvm/test/CodeGen/AArch64/frameaddr.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=arm64-apple-ios7.0 < %s | FileCheck %s -; RUN: llc -mtriple=arm64-apple-ios7.0 -fast-isel -fast-isel-abort < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s define i8* @test_frameaddress0() nounwind { entry: |
