6 files changed, 220 insertions, 0 deletions
diff --git a/llvm/test/MC/AArch64/SVE/mul-diagnostics.s b/llvm/test/MC/AArch64/SVE/mul-diagnostics.s
new file mode 100644
index 00000000000..745c35d613f
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/mul-diagnostics.s
@@ -0,0 +1,38 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Invalid immediate range
+
+mul z0.b, z0.b, #-129
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-128, 127].
+// CHECK-NEXT: mul z0.b, z0.b, #-129
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+mul z0.b, z0.b, #128
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-128, 127].
+// CHECK-NEXT: mul z0.b, z0.b, #128
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Tied operands must match
+
+mul z0.b, z1.b, #0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: mul z0.b, z1.b, #0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+mul z0.b, p7/m, z1.b, z2.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: mul z0.b, p7/m, z1.b, z2.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+mul z0.b, p8/m, z0.b, z1.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: mul z0.b, p8/m, z0.b, z1.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SVE/mul.s b/llvm/test/MC/AArch64/SVE/mul.s
new file mode 100644
index 00000000000..f83b88ee712
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/mul.s
@@ -0,0 +1,80 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+mul z0.b, p7/m, z0.b, z31.b
+// CHECK-INST: mul	z0.b, p7/m, z0.b, z31.b
+// CHECK-ENCODING: [0xe0,0x1f,0x10,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f 10 04 <unknown>
+
+mul z0.h, p7/m, z0.h, z31.h
+// CHECK-INST: mul	z0.h, p7/m, z0.h, z31.h
+// CHECK-ENCODING: [0xe0,0x1f,0x50,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f 50 04 <unknown>
+
+mul z0.s, p7/m, z0.s, z31.s
+// CHECK-INST: mul	z0.s, p7/m, z0.s, z31.s
+// CHECK-ENCODING: [0xe0,0x1f,0x90,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f 90 04 <unknown>
+
+mul z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: mul	z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d0 04 <unknown>
+
+mul z31.b, z31.b, #-128
+// CHECK-INST: mul	z31.b, z31.b, #-128
+// CHECK-ENCODING: [0x1f,0xd0,0x30,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f d0 30 25 <unknown>
+
+mul z31.b, z31.b, #127
+// CHECK-INST: mul	z31.b, z31.b, #127
+// CHECK-ENCODING: [0xff,0xcf,0x30,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf 30 25 <unknown>
+
+mul z31.h, z31.h, #-128
+// CHECK-INST: mul	z31.h, z31.h, #-128
+// CHECK-ENCODING: [0x1f,0xd0,0x70,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f d0 70 25 <unknown>
+
+mul z31.h, z31.h, #127
+// CHECK-INST: mul	z31.h, z31.h, #127
+// CHECK-ENCODING: [0xff,0xcf,0x70,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf 70 25 <unknown>
+
+mul z31.s, z31.s, #-128
+// CHECK-INST: mul	z31.s, z31.s, #-128
+// CHECK-ENCODING: [0x1f,0xd0,0xb0,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f d0 b0 25 <unknown>
+
+mul z31.s, z31.s, #127
+// CHECK-INST: mul	z31.s, z31.s, #127
+// CHECK-ENCODING: [0xff,0xcf,0xb0,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf b0 25 <unknown>
+
+mul z31.d, z31.d, #-128
+// CHECK-INST: mul	z31.d, z31.d, #-128
+// CHECK-ENCODING: [0x1f,0xd0,0xf0,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 1f d0 f0 25 <unknown>
+
+mul z31.d, z31.d, #127
+// CHECK-INST: mul	z31.d, z31.d, #127
+// CHECK-ENCODING: [0xff,0xcf,0xf0,0x25]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff cf f0 25 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/smulh-diagnostics.s b/llvm/test/MC/AArch64/SVE/smulh-diagnostics.s
new file mode 100644
index 00000000000..a856d32965d
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/smulh-diagnostics.s
@@ -0,0 +1,19 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Tied operands must match
+
+smulh z0.b, p7/m, z1.b, z2.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: smulh z0.b, p7/m, z1.b, z2.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+smulh z0.b, p8/m, z0.b, z1.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: smulh z0.b, p8/m, z0.b, z1.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SVE/smulh.s b/llvm/test/MC/AArch64/SVE/smulh.s
new file mode 100644
index 00000000000..354dfd8c841
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/smulh.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+smulh z0.b, p7/m, z0.b, z31.b
+// CHECK-INST: smulh	z0.b, p7/m, z0.b, z31.b
+// CHECK-ENCODING: [0xe0,0x1f,0x12,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f 12 04 <unknown>
+
+smulh z0.h, p7/m, z0.h, z31.h
+// CHECK-INST: smulh	z0.h, p7/m, z0.h, z31.h
+// CHECK-ENCODING: [0xe0,0x1f,0x52,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f 52 04 <unknown>
+
+smulh z0.s, p7/m, z0.s, z31.s
+// CHECK-INST: smulh	z0.s, p7/m, z0.s, z31.s
+// CHECK-ENCODING: [0xe0,0x1f,0x92,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f 92 04 <unknown>
+
+smulh z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: smulh	z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd2,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d2 04 <unknown>
diff --git a/llvm/test/MC/AArch64/SVE/umulh-diagnostics.s b/llvm/test/MC/AArch64/SVE/umulh-diagnostics.s
new file mode 100644
index 00000000000..b2cf7457cf5
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/umulh-diagnostics.s
@@ -0,0 +1,19 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+
+// ------------------------------------------------------------------------- //
+// Tied operands must match
+
+umulh z0.b, p7/m, z1.b, z2.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: umulh z0.b, p7/m, z1.b, z2.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+umulh z0.b, p8/m, z0.b, z1.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: umulh z0.b, p8/m, z0.b, z1.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/llvm/test/MC/AArch64/SVE/umulh.s b/llvm/test/MC/AArch64/SVE/umulh.s
new file mode 100644
index 00000000000..523428335ed
--- /dev/null
+++ b/llvm/test/MC/AArch64/SVE/umulh.s
@@ -0,0 +1,32 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+umulh z0.b, p7/m, z0.b, z31.b
+// CHECK-INST: umulh	z0.b, p7/m, z0.b, z31.b
+// CHECK-ENCODING: [0xe0,0x1f,0x13,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f 13 04 <unknown>
+
+umulh z0.h, p7/m, z0.h, z31.h
+// CHECK-INST: umulh	z0.h, p7/m, z0.h, z31.h
+// CHECK-ENCODING: [0xe0,0x1f,0x53,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f 53 04 <unknown>
+
+umulh z0.s, p7/m, z0.s, z31.s
+// CHECK-INST: umulh	z0.s, p7/m, z0.s, z31.s
+// CHECK-ENCODING: [0xe0,0x1f,0x93,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f 93 04 <unknown>
+
+umulh z0.d, p7/m, z0.d, z31.d
+// CHECK-INST: umulh	z0.d, p7/m, z0.d, z31.d
+// CHECK-ENCODING: [0xe0,0x1f,0xd3,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 1f d3 04 <unknown>