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-rw-r--r--llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll24
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll b/llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
index 2aeb0e1f71f..b2f17e6a33b 100644
--- a/llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
+++ b/llvm/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
@@ -54,3 +54,27 @@ foo:
bar:
ret i32 0
}
+
+; This test case confirms that a record-form instruction is
+; generated even if the branch has a static branch hint.
+
+; CHECK-LABEL: fn4
+define i64 @fn4(i64 %a, i64 %b) {
+; CHECK: ADD8o
+; CHECK-NOT: CMP
+; CHECK: BCC 71
+
+entry:
+ %add = add nsw i64 %b, %a
+ %cmp = icmp eq i64 %add, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ tail call void @exit(i32 signext 0) #3
+ unreachable
+
+if.end:
+ ret i64 %add
+}
+
+declare void @exit(i32 signext)
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