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-rw-r--r--llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir1
-rw-r--r--llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir65
-rw-r--r--llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll15
3 files changed, 81 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir b/llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
index 89ce72343f5..9ef2431df6e 100644
--- a/llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
+++ b/llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
@@ -3,6 +3,7 @@
# RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN,NOXNACK,GFX10 %s
# GCN-LABEL: name: break_smem_clause_simple_load_smrd8_ptr_hidden_bundle
+# GCN: bb.0:
# GCN: }
# XNACK-NEXT: S_NOP
# NOXNACK-NOT: S_NOP
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
index 81c4f8f12be..73d0855f612 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
@@ -16,6 +16,12 @@
# FULL-NEXT: scratchWaveOffsetReg: '$sgpr12'
# FULL-NEXT: frameOffsetReg: '$sgpr12'
# FULL-NEXT: stackPtrOffsetReg: '$sgpr13'
+# FULL-NEXT: argumentInfo:
+# FULL-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# FULL-NEXT: kernargSegmentPtr: { reg: '$sgpr4_sgpr5' }
+# FULL-NEXT: workGroupIDX: { reg: '$sgpr6' }
+# FULL-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr7' }
+# FULL-NEXT: workItemIDX: { reg: '$vgpr0' }
# FULL-NEXT: body:
# SIMPLE: machineFunctionInfo:
@@ -29,6 +35,12 @@
# SIMPLE-NEXT: scratchWaveOffsetReg: '$sgpr12'
# SIMPLE-NEXT: frameOffsetReg: '$sgpr12'
# SIMPLE-NEXT: stackPtrOffsetReg: '$sgpr13'
+# SIMPLE-NEXT: argumentInfo:
+# SIMPLE-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# SIMPLE-NEXT: kernargSegmentPtr: { reg: '$sgpr4_sgpr5' }
+# SIMPLE-NEXT: workGroupIDX: { reg: '$sgpr6' }
+# SIMPLE-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr7' }
+# SIMPLE-NEXT: workItemIDX: { reg: '$vgpr0' }
# SIMPLE-NEXT: body:
name: kernel0
machineFunctionInfo:
@@ -43,6 +55,12 @@ machineFunctionInfo:
scratchWaveOffsetReg: '$sgpr12'
frameOffsetReg: '$sgpr12'
stackPtrOffsetReg: '$sgpr13'
+ argumentInfo:
+ privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+ kernargSegmentPtr: { reg: '$sgpr4_sgpr5' }
+ workGroupIDX: { reg: '$sgpr6' }
+ privateSegmentWaveByteOffset: { reg: '$sgpr7' }
+ workItemIDX: { reg: '$vgpr0' }
body: |
bb.0:
S_ENDPGM 0
@@ -64,8 +82,15 @@ body: |
# FULL-NEXT: scratchWaveOffsetReg: '$scratch_wave_offset_reg'
# FULL-NEXT: frameOffsetReg: '$fp_reg'
# FULL-NEXT: stackPtrOffsetReg: '$sp_reg'
+# FULL-NEXT: argumentInfo:
+# FULL-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# FULL-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
+# FULL-NEXT: body:
# SIMPLE: machineFunctionInfo:
+# SIMPLE-NEXT: argumentInfo:
+# SIMPLE-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# SIMPLE-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
# SIMPLE-NEXT: body:
name: no_mfi
@@ -89,8 +114,15 @@ body: |
# FULL-NEXT: scratchWaveOffsetReg: '$scratch_wave_offset_reg'
# FULL-NEXT: frameOffsetReg: '$fp_reg'
# FULL-NEXT: stackPtrOffsetReg: '$sp_reg'
+# FULL-NEXT: argumentInfo:
+# FULL-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# FULL-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
+# FULL-NEXT: body:
# SIMPLE: machineFunctionInfo:
+# SIMPLE-NEXT: argumentInfo:
+# SIMPLE-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# SIMPLE-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
# SIMPLE-NEXT: body:
name: empty_mfi
@@ -115,9 +147,16 @@ body: |
# FULL-NEXT: scratchWaveOffsetReg: '$scratch_wave_offset_reg'
# FULL-NEXT: frameOffsetReg: '$fp_reg'
# FULL-NEXT: stackPtrOffsetReg: '$sp_reg'
+# FULL-NEXT: argumentInfo:
+# FULL-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# FULL-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
+# FULL-NEXT: body:
# SIMPLE: machineFunctionInfo:
# SIMPLE-NEXT: isEntryFunction: true
+# SIMPLE-NEXT: argumentInfo:
+# SIMPLE-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# SIMPLE-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
# SIMPLE-NEXT: body:
name: empty_mfi_entry_func
@@ -149,3 +188,29 @@ body: |
S_ENDPGM 0
...
+
+---
+# ALL-LABEL: name: fake_stack_arginfo
+
+# FULL: argumentInfo:
+# FULL-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# FULL-NEXT: flatScratchInit: { offset: 4 }
+# FULL-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
+# FULL-NEXT: workItemIDY: { reg: '$vgpr0', mask: 65280 }
+
+# SIMPLE: argumentInfo:
+# SIMPLE-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+# SIMPLE-NEXT: flatScratchInit: { offset: 4 }
+# SIMPLE-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
+# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr0', mask: 65280 }
+name: fake_stack_arginfo
+machineFunctionInfo:
+ argumentInfo:
+ flatScratchInit: { offset: 4 }
+ workItemIDY: { reg: '$vgpr0' , mask: 0xff00 }
+
+body: |
+ bb.0:
+ S_ENDPGM 0
+
+...
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
index 4e233495f5f..9fbf484b2c0 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
+++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
@@ -19,6 +19,12 @@
; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr101'
; CHECK-NEXT: frameOffsetReg: '$sgpr101'
; CHECK-NEXT: stackPtrOffsetReg: '$sgpr101'
+; CHECK-NEXT: argumentInfo:
+; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+; CHECK-NEXT: kernargSegmentPtr: { reg: '$sgpr4_sgpr5' }
+; CHECK-NEXT: workGroupIDX: { reg: '$sgpr6' }
+; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr7' }
+; CHECK-NEXT: workItemIDX: { reg: '$vgpr0' }
; CHECK-NEXT: body:
define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) {
%gep = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds, i32 0, i32 %arg0
@@ -39,6 +45,9 @@ define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) {
; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr101'
; CHECK-NEXT: frameOffsetReg: '$sgpr101'
; CHECK-NEXT: stackPtrOffsetReg: '$sgpr101'
+; CHECK-NEXT: argumentInfo:
+; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr3' }
+; CHECK-NEXT: implicitBufferPtr: { reg: '$sgpr0_sgpr1' }
; CHECK-NEXT: body:
define amdgpu_ps void @ps_shader(i32 %arg0, i32 inreg %arg1) {
ret void
@@ -57,6 +66,9 @@ define amdgpu_ps void @ps_shader(i32 %arg0, i32 inreg %arg1) {
; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr33'
; CHECK-NEXT: frameOffsetReg: '$sgpr5'
; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32'
+; CHECK-NEXT: argumentInfo:
+; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
; CHECK-NEXT: body:
define void @function() {
ret void
@@ -75,6 +87,9 @@ define void @function() {
; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr33'
; CHECK-NEXT: frameOffsetReg: '$sgpr5'
; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32'
+; CHECK-NEXT: argumentInfo:
+; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
+; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr33' }
; CHECK-NEXT: body:
define void @function_nsz() #0 {
ret void
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