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-rw-r--r--llvm/test/Analysis/MemorySSA/pr40754.ll57
-rw-r--r--llvm/test/Analysis/MemorySSA/pr41640.ll5
-rw-r--r--llvm/test/Analysis/MemorySSA/pr42940.ll (renamed from llvm/test/Analysis/MemorySSA/PR42940.ll)0
-rw-r--r--llvm/test/Analysis/MemorySSA/pr43044.ll (renamed from llvm/test/Analysis/MemorySSA/PR43044.ll)0
-rw-r--r--llvm/test/Analysis/MemorySSA/pr43317.ll7
-rw-r--r--llvm/test/Analysis/MemorySSA/pr43438.ll46
6 files changed, 83 insertions, 32 deletions
diff --git a/llvm/test/Analysis/MemorySSA/pr40754.ll b/llvm/test/Analysis/MemorySSA/pr40754.ll
index 8db320d8023..3262a0cdd46 100644
--- a/llvm/test/Analysis/MemorySSA/pr40754.ll
+++ b/llvm/test/Analysis/MemorySSA/pr40754.ll
@@ -11,44 +11,45 @@ target triple = "systemz-unknown"
; Function Attrs: norecurse noreturn nounwind
define dso_local void @func_65() local_unnamed_addr {
; CHECK-LABEL: @func_65()
- br label %1
+label0:
+ br label %label1
-; <label>:1: ; preds = %.thread, %0
- br label %2
+label1: ; preds = %.thread, %label0
+ br label %label2
-; <label>:2: ; preds = %.critedge, %1
- br label %3
+label2: ; preds = %.critedge, %label1
+ br label %label3
-; <label>:3: ; preds = %5, %2
- %storemerge = phi i32 [ 0, %2 ], [ %6, %5 ]
+label3: ; preds = %label5, %label2
+ %storemerge = phi i32 [ 0, %label2 ], [ %tmp6, %label5 ]
store i32 %storemerge, i32* @g_185, align 4
- %4 = icmp ult i32 %storemerge, 2
- br i1 %4, label %5, label %.thread.loopexit
-
-; <label>:5: ; preds = %3
- %6 = add i32 %storemerge, 1
- %7 = zext i32 %6 to i64
- %8 = getelementptr [8 x [4 x [6 x i32]]], [8 x [4 x [6 x i32]]]* @g_120, i64 0, i64 undef, i64 %7, i64 undef
- %9 = load i32, i32* %8, align 4
- %10 = icmp eq i32 %9, 0
- br i1 %10, label %3, label %11
-
-; <label>:11: ; preds = %5
- %storemerge.lcssa4 = phi i32 [ %storemerge, %5 ]
- %12 = icmp eq i32 %storemerge.lcssa4, 0
- br i1 %12, label %.critedge, label %.thread.loopexit3
-
-.critedge: ; preds = %11
+ %tmp4 = icmp ult i32 %storemerge, 2
+ br i1 %tmp4, label %label5, label %.thread.loopexit
+
+label5: ; preds = %label3
+ %tmp6 = add i32 %storemerge, 1
+ %tmp7 = zext i32 %tmp6 to i64
+ %tmp8 = getelementptr [8 x [4 x [6 x i32]]], [8 x [4 x [6 x i32]]]* @g_120, i64 0, i64 undef, i64 %tmp7, i64 undef
+ %tmp9 = load i32, i32* %tmp8, align 4
+ %tmp10 = icmp eq i32 %tmp9, 0
+ br i1 %tmp10, label %label3, label %label11
+
+label11: ; preds = %label5
+ %storemerge.lcssa4 = phi i32 [ %storemerge, %label5 ]
+ %tmp12 = icmp eq i32 %storemerge.lcssa4, 0
+ br i1 %tmp12, label %.critedge, label %.thread.loopexit3
+
+.critedge: ; preds = %label11
store i16 0, i16* @g_329, align 2
- br label %2
+ br label %label2
-.thread.loopexit: ; preds = %3
+.thread.loopexit: ; preds = %label3
br label %.thread
-.thread.loopexit3: ; preds = %11
+.thread.loopexit3: ; preds = %label11
br label %.thread
.thread: ; preds = %.thread.loopexit3, %.thread.loopexit
- br label %1
+ br label %label1
}
diff --git a/llvm/test/Analysis/MemorySSA/pr41640.ll b/llvm/test/Analysis/MemorySSA/pr41640.ll
index 5a765442425..5d2d523202b 100644
--- a/llvm/test/Analysis/MemorySSA/pr41640.ll
+++ b/llvm/test/Analysis/MemorySSA/pr41640.ll
@@ -1,5 +1,4 @@
-; RUN: opt -S -licm -enable-mssa-loop-dependency %s | FileCheck %s
-; REQUIRES: asserts
+; RUN: opt -disable-output -licm -print-memoryssa -enable-mssa-loop-dependency=true < %s 2>&1 | FileCheck %s
target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
target triple = "s390x-ibm-linux"
@@ -8,6 +7,8 @@ target triple = "s390x-ibm-linux"
@g_1087 = external dso_local global i32**, align 8
; CHECK-LABEL: @f1()
+; CHECK: 5 = MemoryPhi(
+; CHECK-NOT: 7 = MemoryPhi(
define dso_local fastcc void @f1() unnamed_addr #0 {
label0:
br i1 undef, label %thread-pre-split.i.preheader, label %label5
diff --git a/llvm/test/Analysis/MemorySSA/PR42940.ll b/llvm/test/Analysis/MemorySSA/pr42940.ll
index ccd3007c45a..ccd3007c45a 100644
--- a/llvm/test/Analysis/MemorySSA/PR42940.ll
+++ b/llvm/test/Analysis/MemorySSA/pr42940.ll
diff --git a/llvm/test/Analysis/MemorySSA/PR43044.ll b/llvm/test/Analysis/MemorySSA/pr43044.ll
index a0b2cf7b9f7..a0b2cf7b9f7 100644
--- a/llvm/test/Analysis/MemorySSA/PR43044.ll
+++ b/llvm/test/Analysis/MemorySSA/pr43044.ll
diff --git a/llvm/test/Analysis/MemorySSA/pr43317.ll b/llvm/test/Analysis/MemorySSA/pr43317.ll
index c7018b96ff2..b1fbfdbaad8 100644
--- a/llvm/test/Analysis/MemorySSA/pr43317.ll
+++ b/llvm/test/Analysis/MemorySSA/pr43317.ll
@@ -1,10 +1,13 @@
-; RUN: opt -S -licm -enable-mssa-loop-dependency=true < %s | FileCheck %s
-; REQUIRES: asserts
+; RUN: opt -disable-output -licm -print-memoryssa -enable-mssa-loop-dependency=true < %s 2>&1 | FileCheck %s
@v_274 = external dso_local global i64, align 1
@v_295 = external dso_local global i16, align 1
@v_335 = external dso_local global i32, align 1
; CHECK-LABEL: @main()
+; CHECK-NOT: 5 = MemoryPhi(
+; CHECK-NOT: 6 = MemoryPhi(
+; CHECK: 4 = MemoryPhi(
+; CHECK-NOT: 7 = MemoryPhi(
define dso_local void @main() {
entry:
store i32 undef, i32* @v_335, align 1
diff --git a/llvm/test/Analysis/MemorySSA/pr43438.ll b/llvm/test/Analysis/MemorySSA/pr43438.ll
new file mode 100644
index 00000000000..2dddcd3153c
--- /dev/null
+++ b/llvm/test/Analysis/MemorySSA/pr43438.ll
@@ -0,0 +1,46 @@
+; RUN: opt -disable-output -licm -print-memoryssa -enable-mssa-loop-dependency=true < %s 2>&1 | FileCheck %s
+target triple = "x86_64-unknown-linux-gnu"
+
+; CHECK-LABEL: @main()
+; CHECK: 5 = MemoryPhi(
+; CHECK-NOT: 7 = MemoryPhi(
+@v_67 = external dso_local global i32, align 1
+@v_76 = external dso_local global i16, align 1
+@v_86 = external dso_local global i16 *, align 1
+
+define dso_local void @main() {
+entry:
+ %v_59 = alloca i16, align 2
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ br i1 undef, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ store i16 undef, i16* %v_59, align 2
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ br i1 undef, label %if.else568, label %cond.end82
+
+cond.false69: ; No predecessors!
+ br label %cond.end82
+
+cond.end82: ; preds = %cond.false69, %cond.true55
+ br i1 undef, label %if.else568, label %land.lhs.true87
+
+land.lhs.true87: ; preds = %cond.end82
+ br i1 undef, label %if.then88, label %if.else568
+
+if.then88: ; preds = %land.lhs.true87
+ store i16 * @v_76, i16 ** @v_86, align 1
+ br label %if.end569
+
+if.else568: ; preds = %land.lhs.true87, %cond.end82, %for.end
+ store volatile i32 undef, i32 * @v_67, align 1
+ br label %if.end569
+
+if.end569: ; preds = %if.else568, %if.then88
+ ret void
+}
+
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