diff options
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/ARM/fullfp16-neg.s | 189 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/fullfp16.s | 257 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/fullfp16-arm-neg.txt | 188 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/fullfp16-arm.txt | 186 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/fullfp16-thumb-neg.txt | 186 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/fullfp16-thumb.txt | 186 |
6 files changed, 1192 insertions, 0 deletions
diff --git a/llvm/test/MC/ARM/fullfp16-neg.s b/llvm/test/MC/ARM/fullfp16-neg.s new file mode 100644 index 00000000000..4ac4683428f --- /dev/null +++ b/llvm/test/MC/ARM/fullfp16-neg.s @@ -0,0 +1,189 @@ +@ RUN: not llvm-mc -triple armv8a-none-eabi -mattr=-fullfp16 -show-encoding < %s 2>&1 | FileCheck %s +@ RUN: not llvm-mc -triple armv8a-none-eabi -mattr=-fullfp16,+thumb-mode -show-encoding < %s 2>&1 | FileCheck %s + + vadd.f16 s0, s1, s0 +@ CHECK: error: instruction requires: + + vsub.f16 s0, s1, s0 +@ CHECK: error: instruction requires: + + vdiv.f16 s0, s1, s0 +@ CHECK: error: instruction requires: + + vmul.f16 s0, s1, s0 +@ CHECK: error: instruction requires: + + vnmul.f16 s0, s1, s0 +@ CHECK: error: instruction requires: + + vmla.f16 s1, s2, s0 +@ CHECK: error: instruction requires: + + vmls.f16 s1, s2, s0 +@ CHECK: error: instruction requires: + + vnmla.f16 s1, s2, s0 +@ CHECK: error: instruction requires: + + vnmls.f16 s1, s2, s0 +@ CHECK: error: instruction requires: + + vcmp.f16 s0, s1 +@ CHECK: error: instruction requires: + + vcmp.f16 s2, #0 +@ CHECK: error: instruction requires: + + vcmpe.f16 s1, s0 +@ CHECK: error: instruction requires: + + vcmpe.f16 s0, #0 +@ CHECK: error: instruction requires: + + vabs.f16 s0, s0 +@ CHECK: error: instruction requires: + + vneg.f16 s0, s0 +@ CHECK: error: instruction requires: + + vsqrt.f16 s0, s0 +@ CHECK: error: instruction requires: + + vcvt.f16.s32 s0, s0 + vcvt.f16.u32 s0, s0 + vcvt.s32.f16 s0, s0 + vcvt.u32.f16 s0, s0 +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: + + vcvtr.s32.f16 s0, s1 + vcvtr.u32.f16 s0, s1 +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: + + vcvt.f16.u32 s0, s0, #20 + vcvt.f16.u16 s0, s0, #1 + vcvt.f16.s32 s1, s1, #20 + vcvt.f16.s16 s17, s17, #1 + vcvt.u32.f16 s12, s12, #20 + vcvt.u16.f16 s28, s28, #1 + vcvt.s32.f16 s1, s1, #20 + vcvt.s16.f16 s17, s17, #1 +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: + + vcvta.s32.f16 s2, s3 +@ CHECK: error: instruction requires: + + vcvtn.s32.f16 s6, s23 +@ CHECK: error: instruction requires: + + vcvtp.s32.f16 s0, s4 +@ CHECK: error: instruction requires: + + vcvtm.s32.f16 s17, s8 +@ CHECK: error: instruction requires: + + vcvta.u32.f16 s2, s3 +@ CHECK: error: instruction requires: + + vcvtn.u32.f16 s6, s23 +@ CHECK: error: instruction requires: + + vcvtp.u32.f16 s0, s4 +@ CHECK: error: instruction requires: + + vcvtm.u32.f16 s17, s8 +@ CHECK: error: instruction requires: + + vselge.f16 s4, s1, s23 +@ CHECK: error: instruction requires: + + vselgt.f16 s0, s1, s0 +@ CHECK: error: instruction requires: + + vseleq.f16 s30, s28, s23 +@ CHECK: error: instruction requires: + + vselvs.f16 s21, s16, s14 +@ CHECK: error: instruction requires: + + vmaxnm.f16 s5, s12, s0 +@ CHECK: error: instruction requires: + + vminnm.f16 s0, s0, s12 +@ CHECK: error: instruction requires: + + vrintz.f16 s3, s24 +@ CHECK: error: instruction requires: + + vrintr.f16 s0, s9 +@ CHECK: error: instruction requires: + + vrintx.f16 s10, s14 +@ CHECK: error: instruction requires: + + vrinta.f16 s12, s1 +@ CHECK: error: instruction requires: + + vrintn.f16 s12, s1 +@ CHECK: error: instruction requires: + + vrintp.f16 s12, s1 +@ CHECK: error: instruction requires: + + vrintm.f16 s12, s1 +@ CHECK: error: instruction requires: + + vfma.f16 s2, s7, s4 +@ CHECK: error: instruction requires: + + vfms.f16 s2, s7, s4 +@ CHECK: error: instruction requires: + + vfnma.f16 s2, s7, s4 +@ CHECK: error: instruction requires: + + vfnms.f16 s2, s7, s4 +@ CHECK: error: instruction requires: + + vmovx.f16 s2, s5 + vins.f16 s2, s5 +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: + + + vldr.16 s1, [pc, #6] + vldr.16 s2, [pc, #510] + vldr.16 s3, [pc, #-510] + vldr.16 s4, [r4, #-18] +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: + + + vstr.16 s1, [pc, #6] + vstr.16 s2, [pc, #510] + vstr.16 s3, [pc, #-510] + vstr.16 s4, [r4, #-18] +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: + + vmov.f16 s0, #1.0 +@ CHECK: error: instruction requires: + + vmov.f16 s1, r2 + vmov.f16 r3, s4 +@ CHECK: error: instruction requires: +@ CHECK: error: instruction requires: diff --git a/llvm/test/MC/ARM/fullfp16.s b/llvm/test/MC/ARM/fullfp16.s new file mode 100644 index 00000000000..bb7863c2353 --- /dev/null +++ b/llvm/test/MC/ARM/fullfp16.s @@ -0,0 +1,257 @@ +@ RUN: llvm-mc -triple armv8a-none-eabi -mattr=+fullfp16 -show-encoding < %s | FileCheck %s --check-prefix=ARM +@ RUN: llvm-mc -triple armv8a-none-eabi -mattr=+fullfp16,+thumb-mode -show-encoding < %s | FileCheck %s --check-prefix=THUMB + + vadd.f16 s0, s1, s0 +@ ARM: vadd.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x30,0xee] +@ THUMB: vadd.f16 s0, s1, s0 @ encoding: [0x30,0xee,0x80,0x09] + + vsub.f16 s0, s1, s0 +@ ARM: vsub.f16 s0, s1, s0 @ encoding: [0xc0,0x09,0x30,0xee] +@ THUMB: vsub.f16 s0, s1, s0 @ encoding: [0x30,0xee,0xc0,0x09] + + vdiv.f16 s0, s1, s0 +@ ARM: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x80,0xee] +@ THUMB: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0xee,0x80,0x09] + + vmul.f16 s0, s1, s0 +@ ARM: vmul.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x20,0xee] +@ THUMB: vmul.f16 s0, s1, s0 @ encoding: [0x20,0xee,0x80,0x09] + + vnmul.f16 s0, s1, s0 +@ ARM: vnmul.f16 s0, s1, s0 @ encoding: [0xc0,0x09,0x20,0xee] +@ THUMB: vnmul.f16 s0, s1, s0 @ encoding: [0x20,0xee,0xc0,0x09] + + vmla.f16 s1, s2, s0 +@ ARM: vmla.f16 s1, s2, s0 @ encoding: [0x00,0x09,0x41,0xee] +@ THUMB: vmla.f16 s1, s2, s0 @ encoding: [0x41,0xee,0x00,0x09] + + vmls.f16 s1, s2, s0 +@ ARM: vmls.f16 s1, s2, s0 @ encoding: [0x40,0x09,0x41,0xee] +@ THUMB: vmls.f16 s1, s2, s0 @ encoding: [0x41,0xee,0x40,0x09] + + vnmla.f16 s1, s2, s0 +@ ARM: vnmla.f16 s1, s2, s0 @ encoding: [0x40,0x09,0x51,0xee] +@ THUMB: vnmla.f16 s1, s2, s0 @ encoding: [0x51,0xee,0x40,0x09] + + vnmls.f16 s1, s2, s0 +@ ARM: vnmls.f16 s1, s2, s0 @ encoding: [0x00,0x09,0x51,0xee] +@ THUMB: vnmls.f16 s1, s2, s0 @ encoding: [0x51,0xee,0x00,0x09] + + vcmp.f16 s0, s1 +@ ARM: vcmp.f16 s0, s1 @ encoding: [0x60,0x09,0xb4,0xee] +@ THUMB: vcmp.f16 s0, s1 @ encoding: [0xb4,0xee,0x60,0x09] + + vcmp.f16 s2, #0 +@ ARM: vcmp.f16 s2, #0 @ encoding: [0x40,0x19,0xb5,0xee] +@ THUMB: vcmp.f16 s2, #0 @ encoding: [0xb5,0xee,0x40,0x19] + + vcmpe.f16 s1, s0 +@ ARM: vcmpe.f16 s1, s0 @ encoding: [0xc0,0x09,0xf4,0xee] +@ THUMB: vcmpe.f16 s1, s0 @ encoding: [0xf4,0xee,0xc0,0x09] + + vcmpe.f16 s0, #0 +@ ARM: vcmpe.f16 s0, #0 @ encoding: [0xc0,0x09,0xb5,0xee] +@ THUMB: vcmpe.f16 s0, #0 @ encoding: [0xb5,0xee,0xc0,0x09] + + vabs.f16 s0, s0 +@ ARM: vabs.f16 s0, s0 @ encoding: [0xc0,0x09,0xb0,0xee] +@ THUMB: vabs.f16 s0, s0 @ encoding: [0xb0,0xee,0xc0,0x09] + + vneg.f16 s0, s0 +@ ARM: vneg.f16 s0, s0 @ encoding: [0x40,0x09,0xb1,0xee] +@ THUMB: vneg.f16 s0, s0 @ encoding: [0xb1,0xee,0x40,0x09] + + vsqrt.f16 s0, s0 +@ ARM: vsqrt.f16 s0, s0 @ encoding: [0xc0,0x09,0xb1,0xee] +@ THUMB: vsqrt.f16 s0, s0 @ encoding: [0xb1,0xee,0xc0,0x09] + + vcvt.f16.s32 s0, s0 + vcvt.f16.u32 s0, s0 + vcvt.s32.f16 s0, s0 + vcvt.u32.f16 s0, s0 +@ ARM: vcvt.f16.s32 s0, s0 @ encoding: [0xc0,0x09,0xb8,0xee] +@ ARM: vcvt.f16.u32 s0, s0 @ encoding: [0x40,0x09,0xb8,0xee] +@ ARM: vcvt.s32.f16 s0, s0 @ encoding: [0xc0,0x09,0xbd,0xee] +@ ARM: vcvt.u32.f16 s0, s0 @ encoding: [0xc0,0x09,0xbc,0xee] +@ THUMB: vcvt.f16.s32 s0, s0 @ encoding: [0xb8,0xee,0xc0,0x09] +@ THUMB: vcvt.f16.u32 s0, s0 @ encoding: [0xb8,0xee,0x40,0x09] +@ THUMB: vcvt.s32.f16 s0, s0 @ encoding: [0xbd,0xee,0xc0,0x09] +@ THUMB: vcvt.u32.f16 s0, s0 @ encoding: [0xbc,0xee,0xc0,0x09] + + vcvtr.s32.f16 s0, s1 + vcvtr.u32.f16 s0, s1 +@ ARM: vcvtr.s32.f16 s0, s1 @ encoding: [0x60,0x09,0xbd,0xee] +@ ARM: vcvtr.u32.f16 s0, s1 @ encoding: [0x60,0x09,0xbc,0xee] +@ THUMB: vcvtr.s32.f16 s0, s1 @ encoding: [0xbd,0xee,0x60,0x09] +@ THUMB: vcvtr.u32.f16 s0, s1 @ encoding: [0xbc,0xee,0x60,0x09] + + vcvt.f16.u32 s0, s0, #20 + vcvt.f16.u16 s0, s0, #1 + vcvt.f16.s32 s1, s1, #20 + vcvt.f16.s16 s17, s17, #1 + vcvt.u32.f16 s12, s12, #20 + vcvt.u16.f16 s28, s28, #1 + vcvt.s32.f16 s1, s1, #20 + vcvt.s16.f16 s17, s17, #1 +@ ARM: vcvt.f16.u32 s0, s0, #20 @ encoding: [0xc6,0x09,0xbb,0xee] +@ ARM: vcvt.f16.u16 s0, s0, #1 @ encoding: [0x67,0x09,0xbb,0xee] +@ ARM: vcvt.f16.s32 s1, s1, #20 @ encoding: [0xc6,0x09,0xfa,0xee] +@ ARM: vcvt.f16.s16 s17, s17, #1 @ encoding: [0x67,0x89,0xfa,0xee] +@ ARM: vcvt.u32.f16 s12, s12, #20 @ encoding: [0xc6,0x69,0xbf,0xee] +@ ARM: vcvt.u16.f16 s28, s28, #1 @ encoding: [0x67,0xe9,0xbf,0xee] +@ ARM: vcvt.s32.f16 s1, s1, #20 @ encoding: [0xc6,0x09,0xfe,0xee] +@ ARM: vcvt.s16.f16 s17, s17, #1 @ encoding: [0x67,0x89,0xfe,0xee] +@ THUMB: vcvt.f16.u32 s0, s0, #20 @ encoding: [0xbb,0xee,0xc6,0x09] +@ THUMB: vcvt.f16.u16 s0, s0, #1 @ encoding: [0xbb,0xee,0x67,0x09] +@ THUMB: vcvt.f16.s32 s1, s1, #20 @ encoding: [0xfa,0xee,0xc6,0x09] +@ THUMB: vcvt.f16.s16 s17, s17, #1 @ encoding: [0xfa,0xee,0x67,0x89] +@ THUMB: vcvt.u32.f16 s12, s12, #20 @ encoding: [0xbf,0xee,0xc6,0x69] +@ THUMB: vcvt.u16.f16 s28, s28, #1 @ encoding: [0xbf,0xee,0x67,0xe9] +@ THUMB: vcvt.s32.f16 s1, s1, #20 @ encoding: [0xfe,0xee,0xc6,0x09] +@ THUMB: vcvt.s16.f16 s17, s17, #1 @ encoding: [0xfe,0xee,0x67,0x89] + + vcvta.s32.f16 s2, s3 +@ ARM: vcvta.s32.f16 s2, s3 @ encoding: [0xe1,0x19,0xbc,0xfe] +@ THUMB: vcvta.s32.f16 s2, s3 @ encoding: [0xbc,0xfe,0xe1,0x19] + + vcvtn.s32.f16 s6, s23 +@ ARM: vcvtn.s32.f16 s6, s23 @ encoding: [0xeb,0x39,0xbd,0xfe] +@ THUMB: vcvtn.s32.f16 s6, s23 @ encoding: [0xbd,0xfe,0xeb,0x39] + + vcvtp.s32.f16 s0, s4 +@ ARM: vcvtp.s32.f16 s0, s4 @ encoding: [0xc2,0x09,0xbe,0xfe] +@ THUMB: vcvtp.s32.f16 s0, s4 @ encoding: [0xbe,0xfe,0xc2,0x09] + + vcvtm.s32.f16 s17, s8 +@ ARM: vcvtm.s32.f16 s17, s8 @ encoding: [0xc4,0x89,0xff,0xfe] +@ THUMB: vcvtm.s32.f16 s17, s8 @ encoding: [0xff,0xfe,0xc4,0x89] + + vcvta.u32.f16 s2, s3 +@ ARM: vcvta.u32.f16 s2, s3 @ encoding: [0x61,0x19,0xbc,0xfe] +@ THUMB: vcvta.u32.f16 s2, s3 @ encoding: [0xbc,0xfe,0x61,0x19] + + vcvtn.u32.f16 s6, s23 +@ ARM: vcvtn.u32.f16 s6, s23 @ encoding: [0x6b,0x39,0xbd,0xfe] +@ THUMB: vcvtn.u32.f16 s6, s23 @ encoding: [0xbd,0xfe,0x6b,0x39] + + vcvtp.u32.f16 s0, s4 +@ ARM: vcvtp.u32.f16 s0, s4 @ encoding: [0x42,0x09,0xbe,0xfe] +@ THUMB: vcvtp.u32.f16 s0, s4 @ encoding: [0xbe,0xfe,0x42,0x09] + + vcvtm.u32.f16 s17, s8 +@ ARM: vcvtm.u32.f16 s17, s8 @ encoding: [0x44,0x89,0xff,0xfe] +@ THUMB: vcvtm.u32.f16 s17, s8 @ encoding: [0xff,0xfe,0x44,0x89] + + vselge.f16 s4, s1, s23 +@ ARM: vselge.f16 s4, s1, s23 @ encoding: [0xab,0x29,0x20,0xfe] +@ THUMB: vselge.f16 s4, s1, s23 @ encoding: [0x20,0xfe,0xab,0x29] + + vselgt.f16 s0, s1, s0 +@ ARM: vselgt.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x30,0xfe] +@ THUMB: vselgt.f16 s0, s1, s0 @ encoding: [0x30,0xfe,0x80,0x09] + + vseleq.f16 s30, s28, s23 +@ ARM: vseleq.f16 s30, s28, s23 @ encoding: [0x2b,0xf9,0x0e,0xfe] +@ THUMB: vseleq.f16 s30, s28, s23 @ encoding: [0x0e,0xfe,0x2b,0xf9] + + vselvs.f16 s21, s16, s14 +@ ARM: vselvs.f16 s21, s16, s14 @ encoding: [0x07,0xa9,0x58,0xfe] +@ THUMB: vselvs.f16 s21, s16, s14 @ encoding: [0x58,0xfe,0x07,0xa9] + + vmaxnm.f16 s5, s12, s0 +@ ARM: vmaxnm.f16 s5, s12, s0 @ encoding: [0x00,0x29,0xc6,0xfe] +@ THUMB: vmaxnm.f16 s5, s12, s0 @ encoding: [0xc6,0xfe,0x00,0x29] + + vminnm.f16 s0, s0, s12 +@ ARM: vminnm.f16 s0, s0, s12 @ encoding: [0x46,0x09,0x80,0xfe] +@ THUMB: vminnm.f16 s0, s0, s12 @ encoding: [0x80,0xfe,0x46,0x09] + + vrintz.f16 s3, s24 +@ ARM: vrintz.f16 s3, s24 @ encoding: [0xcc,0x19,0xf6,0xee] +@ THUMB: vrintz.f16 s3, s24 @ encoding: [0xf6,0xee,0xcc,0x19] + + vrintr.f16 s0, s9 +@ ARM: vrintr.f16 s0, s9 @ encoding: [0x64,0x09,0xb6,0xee] +@ THUMB: vrintr.f16 s0, s9 @ encoding: [0xb6,0xee,0x64,0x09] + + vrintx.f16 s10, s14 +@ ARM: vrintx.f16 s10, s14 @ encoding: [0x47,0x59,0xb7,0xee] +@ THUMB: vrintx.f16 s10, s14 @ encoding: [0xb7,0xee,0x47,0x59] + + vrinta.f16 s12, s1 +@ ARM: vrinta.f16 s12, s1 @ encoding: [0x60,0x69,0xb8,0xfe] +@ THUMB: vrinta.f16 s12, s1 @ encoding: [0xb8,0xfe,0x60,0x69] + + vrintn.f16 s12, s1 +@ ARM: vrintn.f16 s12, s1 @ encoding: [0x60,0x69,0xb9,0xfe] +@ THUMB: vrintn.f16 s12, s1 @ encoding: [0xb9,0xfe,0x60,0x69] + + vrintp.f16 s12, s1 +@ ARM: vrintp.f16 s12, s1 @ encoding: [0x60,0x69,0xba,0xfe] +@ THUMB: vrintp.f16 s12, s1 @ encoding: [0xba,0xfe,0x60,0x69] + + vrintm.f16 s12, s1 +@ ARM: vrintm.f16 s12, s1 @ encoding: [0x60,0x69,0xbb,0xfe] +@ THUMB: vrintm.f16 s12, s1 @ encoding: [0xbb,0xfe,0x60,0x69] + + vfma.f16 s2, s7, s4 +@ ARM: vfma.f16 s2, s7, s4 @ encoding: [0x82,0x19,0xa3,0xee] +@ THUMB: vfma.f16 s2, s7, s4 @ encoding: [0xa3,0xee,0x82,0x19] + + vfms.f16 s2, s7, s4 +@ ARM: vfms.f16 s2, s7, s4 @ encoding: [0xc2,0x19,0xa3,0xee] +@ THUMB: vfms.f16 s2, s7, s4 @ encoding: [0xa3,0xee,0xc2,0x19] + + vfnma.f16 s2, s7, s4 +@ ARM: vfnma.f16 s2, s7, s4 @ encoding: [0xc2,0x19,0x93,0xee] +@ THUMB: vfnma.f16 s2, s7, s4 @ encoding: [0x93,0xee,0xc2,0x19] + + vfnms.f16 s2, s7, s4 +@ ARM: vfnms.f16 s2, s7, s4 @ encoding: [0x82,0x19,0x93,0xee] +@ THUMB: vfnms.f16 s2, s7, s4 @ encoding: [0x93,0xee,0x82,0x19] + + vmovx.f16 s2, s5 + vins.f16 s2, s5 +@ ARM: vmovx.f16 s2, s5 @ encoding: [0x62,0x1a,0xb0,0xfe] +@ ARM: vins.f16 s2, s5 @ encoding: [0xe2,0x1a,0xb0,0xfe] +@ THUMB: vmovx.f16 s2, s5 @ encoding: [0xb0,0xfe,0x62,0x1a] +@ THUMB: vins.f16 s2, s5 @ encoding: [0xb0,0xfe,0xe2,0x1a] + + + vldr.16 s1, [pc, #6] + vldr.16 s2, [pc, #510] + vldr.16 s3, [pc, #-510] + vldr.16 s4, [r4, #-18] +@ ARM: vldr.16 s1, [pc, #6] @ encoding: [0x03,0x09,0xdf,0xed] +@ ARM: vldr.16 s2, [pc, #510] @ encoding: [0xff,0x19,0x9f,0xed] +@ ARM: vldr.16 s3, [pc, #-510] @ encoding: [0xff,0x19,0x5f,0xed] +@ ARM: vldr.16 s4, [r4, #-18] @ encoding: [0x09,0x29,0x14,0xed] +@ THUMB: vldr.16 s1, [pc, #6] @ encoding: [0xdf,0xed,0x03,0x09] +@ THUMB: vldr.16 s2, [pc, #510] @ encoding: [0x9f,0xed,0xff,0x19] +@ THUMB: vldr.16 s3, [pc, #-510] @ encoding: [0x5f,0xed,0xff,0x19] +@ THUMB: vldr.16 s4, [r4, #-18] @ encoding: [0x14,0xed,0x09,0x29] + + + vstr.16 s1, [pc, #6] + vstr.16 s2, [pc, #510] + vstr.16 s3, [pc, #-510] + vstr.16 s4, [r4, #-18] +@ ARM: vstr.16 s1, [pc, #6] @ encoding: [0x03,0x09,0xcf,0xed] +@ ARM: vstr.16 s2, [pc, #510] @ encoding: [0xff,0x19,0x8f,0xed] +@ ARM: vstr.16 s3, [pc, #-510] @ encoding: [0xff,0x19,0x4f,0xed] +@ ARM: vstr.16 s4, [r4, #-18] @ encoding: [0x09,0x29,0x04,0xed] +@ THUMB: vstr.16 s1, [pc, #6] @ encoding: [0xcf,0xed,0x03,0x09] +@ THUMB: vstr.16 s2, [pc, #510] @ encoding: [0x8f,0xed,0xff,0x19] +@ THUMB: vstr.16 s3, [pc, #-510] @ encoding: [0x4f,0xed,0xff,0x19] +@ THUMB: vstr.16 s4, [r4, #-18] @ encoding: [0x04,0xed,0x09,0x29] + + vmov.f16 s0, #1.0 +@ ARM: vmov.f16 s0, #1.000000e+00 @ encoding: [0x00,0x09,0xb7,0xee] +@ THUMB: vmov.f16 s0, #1.000000e+00 @ encoding: [0xb7,0xee,0x00,0x09] + + vmov.f16 s1, r2 + vmov.f16 r3, s4 +@ ARM: vmov.f16 s1, r2 @ encoding: [0x90,0x29,0x00,0xee] +@ ARM: vmov.f16 r3, s4 @ encoding: [0x10,0x39,0x12,0xee] +@ THUMB: vmov.f16 s1, r2 @ encoding: [0x00,0xee,0x90,0x29] +@ THUMB: vmov.f16 r3, s4 @ encoding: [0x12,0xee,0x10,0x39] diff --git a/llvm/test/MC/Disassembler/ARM/fullfp16-arm-neg.txt b/llvm/test/MC/Disassembler/ARM/fullfp16-arm-neg.txt new file mode 100644 index 00000000000..cd26f09a4e9 --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/fullfp16-arm-neg.txt @@ -0,0 +1,188 @@ +# RUN: not llvm-mc -disassemble -triple armv8a-none-eabi -mattr=-fullfp16 -show-encoding < %s 2>&1 | FileCheck %s + +# CHECK: warning: invalid instruction encoding +[0x80,0x09,0x30,0xee] + +# CHECK: warning: invalid instruction encoding +[0xc0,0x09,0x30,0xee] + +# CHECK: warning: invalid instruction encoding +[0x80,0x09,0x80,0xee] + +# CHECK: warning: invalid instruction encoding +[0x80,0x09,0x20,0xee] + +# CHECK: warning: invalid instruction encoding +[0xc0,0x09,0x20,0xee] + +# CHECK: warning: invalid instruction encoding +[0x00,0x09,0x41,0xee] + +# CHECK: warning: invalid instruction encoding +[0x40,0x09,0x41,0xee] + +# CHECK: warning: invalid instruction encoding +[0x40,0x09,0x51,0xee] + +# CHECK: warning: invalid instruction encoding +[0x00,0x09,0x51,0xee] + +# CHECK: warning: invalid instruction encoding +[0x60,0x09,0xb4,0xee] + +# CHECK: warning: invalid instruction encoding +[0x40,0x19,0xb5,0xee] + +# CHECK: warning: invalid instruction encoding +[0xc0,0x09,0xf4,0xee] + +# CHECK: warning: invalid instruction encoding +[0xc0,0x09,0xb5,0xee] + +# CHECK: warning: invalid instruction encoding +[0xc0,0x09,0xb0,0xee] + +# CHECK: warning: invalid instruction encoding +[0x40,0x09,0xb1,0xee] + +# CHECK: warning: invalid instruction encoding +[0xc0,0x09,0xb1,0xee] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0xc0,0x09,0xb8,0xee] +[0x40,0x09,0xb8,0xee] +[0xc0,0x09,0xbd,0xee] +[0xc0,0x09,0xbc,0xee] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0x60,0x09,0xbd,0xee] +[0x60,0x09,0xbc,0xee] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0xc6,0x09,0xbb,0xee] +[0x67,0x09,0xbb,0xee] +[0xc6,0x09,0xfa,0xee] +[0x67,0x89,0xfa,0xee] +[0xc6,0x69,0xbf,0xee] +[0x67,0xe9,0xbf,0xee] +[0xc6,0x09,0xfe,0xee] +[0x67,0x89,0xfe,0xee] + +# CHECK: warning: invalid instruction encoding +[0xe1,0x19,0xbc,0xfe] + +# CHECK: warning: invalid instruction encoding +[0xeb,0x39,0xbd,0xfe] + +# CHECK: warning: invalid instruction encoding +[0xc2,0x09,0xbe,0xfe] + +# CHECK: warning: invalid instruction encoding +[0xc4,0x89,0xff,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x61,0x19,0xbc,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x6b,0x39,0xbd,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x42,0x09,0xbe,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x44,0x89,0xff,0xfe] + +# CHECK: warning: invalid instruction encoding +[0xab,0x29,0x20,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x80,0x09,0x30,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x2b,0xf9,0x0e,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x07,0xa9,0x58,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x00,0x29,0xc6,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x46,0x09,0x80,0xfe] + +# CHECK: warning: invalid instruction encoding +[0xcc,0x19,0xf6,0xee] + +# CHECK: warning: invalid instruction encoding +[0x64,0x09,0xb6,0xee] + +# CHECK: warning: invalid instruction encoding +[0x47,0x59,0xb7,0xee] + +# CHECK: warning: invalid instruction encoding +[0x60,0x69,0xb8,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x60,0x69,0xb9,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x60,0x69,0xba,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x60,0x69,0xbb,0xfe] + +# CHECK: warning: invalid instruction encoding +[0x82,0x19,0xa3,0xee] + +# CHECK: warning: invalid instruction encoding +[0xc2,0x19,0xa3,0xee] + +# CHECK: warning: invalid instruction encoding +[0xc2,0x19,0x93,0xee] + +# CHECK: warning: invalid instruction encoding +[0x82,0x19,0x93,0xee] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0x62,0x1a,0xb0,0xfe] +[0xe2,0x1a,0xb0,0xfe] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0x03,0x09,0xdf,0xed] +[0xff,0x19,0x9f,0xed] +[0xff,0x19,0x5f,0xed] +[0x09,0x29,0x14,0xed] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0x03,0x09,0xcf,0xed] +[0xff,0x19,0x8f,0xed] +[0xff,0x19,0x4f,0xed] +[0x09,0x29,0x04,0xed] + +# CHECK: warning: invalid instruction encoding +[0x00,0x09,0xb7,0xee] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0x90,0x29,0x00,0xee] +[0x10,0x39,0x12,0xee] + +# CHECK-NOT: warning: invalid instruction encoding diff --git a/llvm/test/MC/Disassembler/ARM/fullfp16-arm.txt b/llvm/test/MC/Disassembler/ARM/fullfp16-arm.txt new file mode 100644 index 00000000000..8a7ce68933e --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/fullfp16-arm.txt @@ -0,0 +1,186 @@ +# RUN: llvm-mc -disassemble -triple armv8a-none-eabi -mattr=+fullfp16 -show-encoding < %s | FileCheck %s + +# CHECK: vadd.f16 s0, s1, s0 +[0x80,0x09,0x30,0xee] + +# CHECK: vsub.f16 s0, s1, s0 +[0xc0,0x09,0x30,0xee] + +# CHECK: vdiv.f16 s0, s1, s0 +[0x80,0x09,0x80,0xee] + +# CHECK: vmul.f16 s0, s1, s0 +[0x80,0x09,0x20,0xee] + +# CHECK: vnmul.f16 s0, s1, s0 +[0xc0,0x09,0x20,0xee] + +# CHECK: vmla.f16 s1, s2, s0 +[0x00,0x09,0x41,0xee] + +# CHECK: vmls.f16 s1, s2, s0 +[0x40,0x09,0x41,0xee] + +# CHECK: vnmla.f16 s1, s2, s0 +[0x40,0x09,0x51,0xee] + +# CHECK: vnmls.f16 s1, s2, s0 +[0x00,0x09,0x51,0xee] + +# CHECK: vcmp.f16 s0, s1 +[0x60,0x09,0xb4,0xee] + +# CHECK: vcmp.f16 s2, #0 +[0x40,0x19,0xb5,0xee] + +# CHECK: vcmpe.f16 s1, s0 +[0xc0,0x09,0xf4,0xee] + +# CHECK: vcmpe.f16 s0, #0 +[0xc0,0x09,0xb5,0xee] + +# CHECK: vabs.f16 s0, s0 +[0xc0,0x09,0xb0,0xee] + +# CHECK: vneg.f16 s0, s0 +[0x40,0x09,0xb1,0xee] + +# CHECK: vsqrt.f16 s0, s0 +[0xc0,0x09,0xb1,0xee] + +# CHECK: vcvt.f16.s32 s0, s0 +# CHECK: vcvt.f16.u32 s0, s0 +# CHECK: vcvt.s32.f16 s0, s0 +# CHECK: vcvt.u32.f16 s0, s0 +[0xc0,0x09,0xb8,0xee] +[0x40,0x09,0xb8,0xee] +[0xc0,0x09,0xbd,0xee] +[0xc0,0x09,0xbc,0xee] + +# CHECK: vcvtr.s32.f16 s0, s1 +# CHECK: vcvtr.u32.f16 s0, s1 +[0x60,0x09,0xbd,0xee] +[0x60,0x09,0xbc,0xee] + +# CHECK: vcvt.f16.u32 s0, s0, #20 +# CHECK: vcvt.f16.u16 s0, s0, #1 +# CHECK: vcvt.f16.s32 s1, s1, #20 +# CHECK: vcvt.f16.s16 s17, s17, #1 +# CHECK: vcvt.u32.f16 s12, s12, #20 +# CHECK: vcvt.u16.f16 s28, s28, #1 +# CHECK: vcvt.s32.f16 s1, s1, #20 +# CHECK: vcvt.s16.f16 s17, s17, #1 +[0xc6,0x09,0xbb,0xee] +[0x67,0x09,0xbb,0xee] +[0xc6,0x09,0xfa,0xee] +[0x67,0x89,0xfa,0xee] +[0xc6,0x69,0xbf,0xee] +[0x67,0xe9,0xbf,0xee] +[0xc6,0x09,0xfe,0xee] +[0x67,0x89,0xfe,0xee] + +# CHECK: vcvta.s32.f16 s2, s3 +[0xe1,0x19,0xbc,0xfe] + +# CHECK: vcvtn.s32.f16 s6, s23 +[0xeb,0x39,0xbd,0xfe] + +# CHECK: vcvtp.s32.f16 s0, s4 +[0xc2,0x09,0xbe,0xfe] + +# CHECK: vcvtm.s32.f16 s17, s8 +[0xc4,0x89,0xff,0xfe] + +# CHECK: vcvta.u32.f16 s2, s3 +[0x61,0x19,0xbc,0xfe] + +# CHECK: vcvtn.u32.f16 s6, s23 +[0x6b,0x39,0xbd,0xfe] + +# CHECK: vcvtp.u32.f16 s0, s4 +[0x42,0x09,0xbe,0xfe] + +# CHECK: vcvtm.u32.f16 s17, s8 +[0x44,0x89,0xff,0xfe] + +# CHECK: vselge.f16 s4, s1, s23 +[0xab,0x29,0x20,0xfe] + +# CHECK: vselgt.f16 s0, s1, s0 +[0x80,0x09,0x30,0xfe] + +# CHECK: vseleq.f16 s30, s28, s23 +[0x2b,0xf9,0x0e,0xfe] + +# CHECK: vselvs.f16 s21, s16, s14 +[0x07,0xa9,0x58,0xfe] + +# CHECK: vmaxnm.f16 s5, s12, s0 +[0x00,0x29,0xc6,0xfe] + +# CHECK: vminnm.f16 s0, s0, s12 +[0x46,0x09,0x80,0xfe] + +# CHECK: vrintz.f16 s3, s24 +[0xcc,0x19,0xf6,0xee] + +# CHECK: vrintr.f16 s0, s9 +[0x64,0x09,0xb6,0xee] + +# CHECK: vrintx.f16 s10, s14 +[0x47,0x59,0xb7,0xee] + +# CHECK: vrinta.f16 s12, s1 +[0x60,0x69,0xb8,0xfe] + +# CHECK: vrintn.f16 s12, s1 +[0x60,0x69,0xb9,0xfe] + +# CHECK: vrintp.f16 s12, s1 +[0x60,0x69,0xba,0xfe] + +# CHECK: vrintm.f16 s12, s1 +[0x60,0x69,0xbb,0xfe] + +# CHECK: vfma.f16 s2, s7, s4 +[0x82,0x19,0xa3,0xee] + +# CHECK: vfms.f16 s2, s7, s4 +[0xc2,0x19,0xa3,0xee] + +# CHECK: vfnma.f16 s2, s7, s4 +[0xc2,0x19,0x93,0xee] + +# CHECK: vfnms.f16 s2, s7, s4 +[0x82,0x19,0x93,0xee] + +# CHECK: vmovx.f16 s2, s5 +# CHECK: vins.f16 s2, s5 +[0x62,0x1a,0xb0,0xfe] +[0xe2,0x1a,0xb0,0xfe] + +# CHECK: vldr.16 s1, [pc, #6] +# CHECK: vldr.16 s2, [pc, #510] +# CHECK: vldr.16 s3, [pc, #-510] +# CHECK: vldr.16 s4, [r4, #-18] +[0x03,0x09,0xdf,0xed] +[0xff,0x19,0x9f,0xed] +[0xff,0x19,0x5f,0xed] +[0x09,0x29,0x14,0xed] + +# CHECK: vstr.16 s1, [pc, #6] +# CHECK: vstr.16 s2, [pc, #510] +# CHECK: vstr.16 s3, [pc, #-510] +# CHECK: vstr.16 s4, [r4, #-18] +[0x03,0x09,0xcf,0xed] +[0xff,0x19,0x8f,0xed] +[0xff,0x19,0x4f,0xed] +[0x09,0x29,0x04,0xed] + +# CHECK: vmov.f16 s0, #1.0 +[0x00,0x09,0xb7,0xee] + +# CHECK: vmov.f16 s1, r2 +# CHECK: vmov.f16 r3, s4 +[0x90,0x29,0x00,0xee] +[0x10,0x39,0x12,0xee] diff --git a/llvm/test/MC/Disassembler/ARM/fullfp16-thumb-neg.txt b/llvm/test/MC/Disassembler/ARM/fullfp16-thumb-neg.txt new file mode 100644 index 00000000000..ecb8fabd4ca --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/fullfp16-thumb-neg.txt @@ -0,0 +1,186 @@ +# RUN: not llvm-mc -disassemble -triple thumbv8a-none-eabi -mattr=-fullfp16,+thumb-mode -show-encoding < %s 2>&1 | FileCheck %s + +# CHECK: warning: invalid instruction encoding +[0x30,0xee,0x80,0x09] + +# CHECK: warning: invalid instruction encoding +[0x30,0xee,0xc0,0x09] + +# CHECK: warning: invalid instruction encoding +[0x80,0xee,0x80,0x09] + +# CHECK: warning: invalid instruction encoding +[0x20,0xee,0x80,0x09] + +# CHECK: warning: invalid instruction encoding +[0x20,0xee,0xc0,0x09] + +# CHECK: warning: invalid instruction encoding +[0x41,0xee,0x00,0x09] + +# CHECK: warning: invalid instruction encoding +[0x41,0xee,0x40,0x09] + +# CHECK: warning: invalid instruction encoding +[0x51,0xee,0x40,0x09] + +# CHECK: warning: invalid instruction encoding +[0x51,0xee,0x00,0x09] + +# CHECK: warning: invalid instruction encoding +[0xb4,0xee,0x60,0x09] + +# CHECK: warning: invalid instruction encoding +[0xb5,0xee,0x40,0x19] + +# CHECK: warning: invalid instruction encoding +[0xf4,0xee,0xc0,0x09] + +# CHECK: warning: invalid instruction encoding +[0xb5,0xee,0xc0,0x09] + +# CHECK: warning: invalid instruction encoding +[0xb0,0xee,0xc0,0x09] + +# CHECK: warning: invalid instruction encoding +[0xb1,0xee,0x40,0x09] + +# CHECK: warning: invalid instruction encoding +[0xb1,0xee,0xc0,0x09] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0xb8,0xee,0xc0,0x09] +[0xb8,0xee,0x40,0x09] +[0xbd,0xee,0xc0,0x09] +[0xbc,0xee,0xc0,0x09] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0xbd,0xee,0x60,0x09] +[0xbc,0xee,0x60,0x09] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0xbb,0xee,0xc6,0x09] +[0xbb,0xee,0x67,0x09] +[0xfa,0xee,0xc6,0x09] +[0xfa,0xee,0x67,0x89] +[0xbf,0xee,0xc6,0x69] +[0xbf,0xee,0x67,0xe9] +[0xfe,0xee,0xc6,0x09] +[0xfe,0xee,0x67,0x89] + +# CHECK: warning: invalid instruction encoding +[0xbc,0xfe,0xe1,0x19] + +# CHECK: warning: invalid instruction encoding +[0xbd,0xfe,0xeb,0x39] + +# CHECK: warning: invalid instruction encoding +[0xbe,0xfe,0xc2,0x09] + +# CHECK: warning: invalid instruction encoding +[0xff,0xfe,0xc4,0x89] + +# CHECK: warning: invalid instruction encoding +[0xbc,0xfe,0x61,0x19] + +# CHECK: warning: invalid instruction encoding +[0xbd,0xfe,0x6b,0x39] + +# CHECK: warning: invalid instruction encoding +[0xbe,0xfe,0x42,0x09] + +# CHECK: warning: invalid instruction encoding +[0xff,0xfe,0x44,0x89] + +# CHECK: warning: invalid instruction encoding +[0x20,0xfe,0xab,0x29] + +# CHECK: warning: invalid instruction encoding +[0x30,0xfe,0x80,0x09] + +# CHECK: warning: invalid instruction encoding +[0x0e,0xfe,0x2b,0xf9] + +# CHECK: warning: invalid instruction encoding +[0x58,0xfe,0x07,0xa9] + +# CHECK: warning: invalid instruction encoding +[0xc6,0xfe,0x00,0x29] + +# CHECK: warning: invalid instruction encoding +[0x80,0xfe,0x46,0x09] + +# CHECK: warning: invalid instruction encoding +[0xf6,0xee,0xcc,0x19] + +# CHECK: warning: invalid instruction encoding +[0xb6,0xee,0x64,0x09] + +# CHECK: warning: invalid instruction encoding +[0xb7,0xee,0x47,0x59] + +# CHECK: warning: invalid instruction encoding +[0xb8,0xfe,0x60,0x69] + +# CHECK: warning: invalid instruction encoding +[0xb9,0xfe,0x60,0x69] + +# CHECK: warning: invalid instruction encoding +[0xba,0xfe,0x60,0x69] + +# CHECK: warning: invalid instruction encoding +[0xbb,0xfe,0x60,0x69] + +# CHECK: warning: invalid instruction encoding +[0xa3,0xee,0x82,0x19] + +# CHECK: warning: invalid instruction encoding +[0xa3,0xee,0xc2,0x19] + +# CHECK: warning: invalid instruction encoding +[0x93,0xee,0xc2,0x19] + +# CHECK: warning: invalid instruction encoding +[0x93,0xee,0x82,0x19] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0xb0,0xfe,0x62,0x1a] +[0xb0,0xfe,0xe2,0x1a] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0xdf,0xed,0x03,0x09] +[0x9f,0xed,0xff,0x19] +[0x5f,0xed,0xff,0x19] +[0x14,0xed,0x09,0x29] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0xcf,0xed,0x03,0x09] +[0x8f,0xed,0xff,0x19] +[0x4f,0xed,0xff,0x19] +[0x04,0xed,0x09,0x29] + +# CHECK: warning: invalid instruction encoding +[0xb7,0xee,0x00,0x09] + +# CHECK: warning: invalid instruction encoding +# CHECK: warning: invalid instruction encoding +[0x00,0xee,0x90,0x29] +[0x12,0xee,0x10,0x39] diff --git a/llvm/test/MC/Disassembler/ARM/fullfp16-thumb.txt b/llvm/test/MC/Disassembler/ARM/fullfp16-thumb.txt new file mode 100644 index 00000000000..45117205143 --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/fullfp16-thumb.txt @@ -0,0 +1,186 @@ +# RUN: llvm-mc -disassemble -triple thumbv8a-none-eabi -mattr=+fullfp16,+thumb-mode -show-encoding < %s | FileCheck %s + +# CHECK: vadd.f16 s0, s1, s0 +[0x30,0xee,0x80,0x09] + +# CHECK: vsub.f16 s0, s1, s0 +[0x30,0xee,0xc0,0x09] + +# CHECK: vdiv.f16 s0, s1, s0 +[0x80,0xee,0x80,0x09] + +# CHECK: vmul.f16 s0, s1, s0 +[0x20,0xee,0x80,0x09] + +# CHECK: vnmul.f16 s0, s1, s0 +[0x20,0xee,0xc0,0x09] + +# CHECK: vmla.f16 s1, s2, s0 +[0x41,0xee,0x00,0x09] + +# CHECK: vmls.f16 s1, s2, s0 +[0x41,0xee,0x40,0x09] + +# CHECK: vnmla.f16 s1, s2, s0 +[0x51,0xee,0x40,0x09] + +# CHECK: vnmls.f16 s1, s2, s0 +[0x51,0xee,0x00,0x09] + +# CHECK: vcmp.f16 s0, s1 +[0xb4,0xee,0x60,0x09] + +# CHECK: vcmp.f16 s2, #0 +[0xb5,0xee,0x40,0x19] + +# CHECK: vcmpe.f16 s1, s0 +[0xf4,0xee,0xc0,0x09] + +# CHECK: vcmpe.f16 s0, #0 +[0xb5,0xee,0xc0,0x09] + +# CHECK: vabs.f16 s0, s0 +[0xb0,0xee,0xc0,0x09] + +# CHECK: vneg.f16 s0, s0 +[0xb1,0xee,0x40,0x09] + +# CHECK: vsqrt.f16 s0, s0 +[0xb1,0xee,0xc0,0x09] + +# CHECK: vcvt.f16.s32 s0, s0 +# CHECK: vcvt.f16.u32 s0, s0 +# CHECK: vcvt.s32.f16 s0, s0 +# CHECK: vcvt.u32.f16 s0, s0 +[0xb8,0xee,0xc0,0x09] +[0xb8,0xee,0x40,0x09] +[0xbd,0xee,0xc0,0x09] +[0xbc,0xee,0xc0,0x09] + +# CHECK: vcvtr.s32.f16 s0, s1 +# CHECK: vcvtr.u32.f16 s0, s1 +[0xbd,0xee,0x60,0x09] +[0xbc,0xee,0x60,0x09] + +# CHECK: vcvt.f16.u32 s0, s0, #20 +# CHECK: vcvt.f16.u16 s0, s0, #1 +# CHECK: vcvt.f16.s32 s1, s1, #20 +# CHECK: vcvt.f16.s16 s17, s17, #1 +# CHECK: vcvt.u32.f16 s12, s12, #20 +# CHECK: vcvt.u16.f16 s28, s28, #1 +# CHECK: vcvt.s32.f16 s1, s1, #20 +# CHECK: vcvt.s16.f16 s17, s17, #1 +[0xbb,0xee,0xc6,0x09] +[0xbb,0xee,0x67,0x09] +[0xfa,0xee,0xc6,0x09] +[0xfa,0xee,0x67,0x89] +[0xbf,0xee,0xc6,0x69] +[0xbf,0xee,0x67,0xe9] +[0xfe,0xee,0xc6,0x09] +[0xfe,0xee,0x67,0x89] + +# CHECK: vcvta.s32.f16 s2, s3 +[0xbc,0xfe,0xe1,0x19] + +# CHECK: vcvtn.s32.f16 s6, s23 +[0xbd,0xfe,0xeb,0x39] + +# CHECK: vcvtp.s32.f16 s0, s4 +[0xbe,0xfe,0xc2,0x09] + +# CHECK: vcvtm.s32.f16 s17, s8 +[0xff,0xfe,0xc4,0x89] + +# CHECK: vcvta.u32.f16 s2, s3 +[0xbc,0xfe,0x61,0x19] + +# CHECK: vcvtn.u32.f16 s6, s23 +[0xbd,0xfe,0x6b,0x39] + +# CHECK: vcvtp.u32.f16 s0, s4 +[0xbe,0xfe,0x42,0x09] + +# CHECK: vcvtm.u32.f16 s17, s8 +[0xff,0xfe,0x44,0x89] + +# CHECK: vselge.f16 s4, s1, s23 +[0x20,0xfe,0xab,0x29] + +# CHECK: vselgt.f16 s0, s1, s0 +[0x30,0xfe,0x80,0x09] + +# CHECK: vseleq.f16 s30, s28, s23 +[0x0e,0xfe,0x2b,0xf9] + +# CHECK: vselvs.f16 s21, s16, s14 +[0x58,0xfe,0x07,0xa9] + +# CHECK: vmaxnm.f16 s5, s12, s0 +[0xc6,0xfe,0x00,0x29] + +# CHECK: vminnm.f16 s0, s0, s12 +[0x80,0xfe,0x46,0x09] + +# CHECK: vrintz.f16 s3, s24 +[0xf6,0xee,0xcc,0x19] + +# CHECK: vrintr.f16 s0, s9 +[0xb6,0xee,0x64,0x09] + +# CHECK: vrintx.f16 s10, s14 +[0xb7,0xee,0x47,0x59] + +# CHECK: vrinta.f16 s12, s1 +[0xb8,0xfe,0x60,0x69] + +# CHECK: vrintn.f16 s12, s1 +[0xb9,0xfe,0x60,0x69] + +# CHECK: vrintp.f16 s12, s1 +[0xba,0xfe,0x60,0x69] + +# CHECK: vrintm.f16 s12, s1 +[0xbb,0xfe,0x60,0x69] + +# CHECK: vfma.f16 s2, s7, s4 +[0xa3,0xee,0x82,0x19] + +# CHECK: vfms.f16 s2, s7, s4 +[0xa3,0xee,0xc2,0x19] + +# CHECK: vfnma.f16 s2, s7, s4 +[0x93,0xee,0xc2,0x19] + +# CHECK: vfnms.f16 s2, s7, s4 +[0x93,0xee,0x82,0x19] + +# CHECK: vmovx.f16 s2, s5 +# CHECK: vins.f16 s2, s5 +[0xb0,0xfe,0x62,0x1a] +[0xb0,0xfe,0xe2,0x1a] + +# CHECK: vldr.16 s1, [pc, #6] +# CHECK: vldr.16 s2, [pc, #510] +# CHECK: vldr.16 s3, [pc, #-510] +# CHECK: vldr.16 s4, [r4, #-18] +[0xdf,0xed,0x03,0x09] +[0x9f,0xed,0xff,0x19] +[0x5f,0xed,0xff,0x19] +[0x14,0xed,0x09,0x29] + +# CHECK: vstr.16 s1, [pc, #6] +# CHECK: vstr.16 s2, [pc, #510] +# CHECK: vstr.16 s3, [pc, #-510] +# CHECK: vstr.16 s4, [r4, #-18] +[0xcf,0xed,0x03,0x09] +[0x8f,0xed,0xff,0x19] +[0x4f,0xed,0xff,0x19] +[0x04,0xed,0x09,0x29] + +# CHECK: vmov.f16 s0, #1.0 +[0xb7,0xee,0x00,0x09] + +# CHECK: vmov.f16 s1, r2 +# CHECK: vmov.f16 r3, s4 +[0x00,0xee,0x90,0x29] +[0x12,0xee,0x10,0x39] |
