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-rw-r--r--llvm/test/CodeGen/AArch64/fptouint-i8-zext.ll4
-rw-r--r--llvm/test/CodeGen/PowerPC/fp64-to-int16.ll21
2 files changed, 24 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AArch64/fptouint-i8-zext.ll b/llvm/test/CodeGen/AArch64/fptouint-i8-zext.ll
index 682683751a8..4e07c62ba99 100644
--- a/llvm/test/CodeGen/AArch64/fptouint-i8-zext.ll
+++ b/llvm/test/CodeGen/AArch64/fptouint-i8-zext.ll
@@ -3,9 +3,11 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64"
+; If the float value is negative or too large, the result is undefined anyway;
+; otherwise, fcvtzs must returns a value in [0, 256), which guarantees zext.
+
; CHECK-LABEL: float_char_int_func:
; CHECK: fcvtzs [[A:w[0-9]+]], s0
-; CHECK-NEXT: and w0, [[A]], #0xff
; CHECK-NEXT: ret
define i32 @float_char_int_func(float %infloatVal) {
entry:
diff --git a/llvm/test/CodeGen/PowerPC/fp64-to-int16.ll b/llvm/test/CodeGen/PowerPC/fp64-to-int16.ll
new file mode 100644
index 00000000000..10d58c2d766
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/fp64-to-int16.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O0 < %s | FileCheck %s
+target triple = "powerpc64le--linux-gnu"
+
+define i1 @Test(double %a) {
+; CHECK-LABEL: Test:
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: xscvdpsxws 1, 1
+; CHECK-NEXT: mfvsrwz 3, 1
+; CHECK-NEXT: xori 3, 3, 65534
+; CHECK-NEXT: cntlzw 3, 3
+; CHECK-NEXT: srwi 3, 3, 5
+; CHECK-NEXT: # implicit-def: %X4
+; CHECK-NEXT: mr 4, 3
+; CHECK-NEXT: mr 3, 4
+; CHECK-NEXT: blr
+entry:
+ %conv = fptoui double %a to i16
+ %cmp = icmp eq i16 %conv, -2
+ ret i1 %cmp
+}
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