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-rw-r--r--llvm/test/CodeGen/PowerPC/htm.ll125
-rw-r--r--llvm/test/MC/PowerPC/htm.s53
2 files changed, 178 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/htm.ll b/llvm/test/CodeGen/PowerPC/htm.ll
new file mode 100644
index 00000000000..0e4304dc163
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/htm.ll
@@ -0,0 +1,125 @@
+; RUN: llc -mcpu=pwr8 -mattr=+htm < %s | FileCheck %s
+target datalayout = "E-m:e-i64:64-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+define zeroext i32 @test1() {
+entry:
+ %0 = tail call i32 @llvm.ppc.tbegin(i32 0)
+ ret i32 %0
+
+; CHECK-LABEL: @test1
+; CHECK: tbegin. 0
+; CHECK: mfocrf [[REGISTER1:[0-9]+]], 128
+; CHECK: rlwinm [[REGISTER2:[0-9]+]], [[REGISTER1]], 3, 31, 31
+; CHECK: xori {{[0-9]+}}, [[REGISTER2]], 1
+}
+
+declare i32 @llvm.ppc.tbegin(i32) #1
+
+
+define zeroext i32 @test2() {
+entry:
+ %0 = tail call i32 @llvm.ppc.tend(i32 0)
+ ret i32 %0
+; CHECK-LABEL: @test2
+; CHECK: tend. 0
+; CHECK: mfocrf {{[0-9]+}}, 128
+}
+
+declare i32 @llvm.ppc.tend(i32)
+
+
+define void @test3() {
+entry:
+ %0 = tail call i32 @llvm.ppc.tabort(i32 0)
+ %1 = tail call i32 @llvm.ppc.tabortdc(i32 0, i32 1, i32 2)
+ %2 = tail call i32 @llvm.ppc.tabortdci(i32 0, i32 1, i32 2)
+ %3 = tail call i32 @llvm.ppc.tabortwc(i32 0, i32 1, i32 2)
+ %4 = tail call i32 @llvm.ppc.tabortwci(i32 0, i32 1, i32 2)
+ ret void
+; CHECK-LABEL: @test3
+; CHECK: tabort. {{[0-9]+}}
+; CHECK: tabortdc. 0, {{[0-9]+}}, {{[0-9]+}}
+; CHECK: tabortdci. 0, {{[0-9]+}}, 2
+; CHECK: tabortwc. 0, {{[0-9]+}}, {{[0-9]+}}
+; CHECK: tabortwci. 0, {{[0-9]+}}, 2
+}
+
+declare i32 @llvm.ppc.tabort(i32)
+declare i32 @llvm.ppc.tabortdc(i32, i32, i32)
+declare i32 @llvm.ppc.tabortdci(i32, i32, i32)
+declare i32 @llvm.ppc.tabortwc(i32, i32, i32)
+declare i32 @llvm.ppc.tabortwci(i32, i32, i32)
+
+
+define void @test4() {
+entry:
+ %0 = tail call i32 @llvm.ppc.tendall()
+ %1 = tail call i32 @llvm.ppc.tresume()
+ %2 = tail call i32 @llvm.ppc.tsuspend()
+ ret void
+; CHECK-LABEL: @test4
+; CHECK: tend. 1
+; CHECK: tsr. 1
+; CHECK: tsr. 0
+}
+
+declare i32 @llvm.ppc.tendall()
+declare i32 @llvm.ppc.tresume()
+declare i32 @llvm.ppc.tsuspend()
+
+
+define void @test5(i64 %v) {
+entry:
+ tail call void @llvm.ppc.set.texasr(i64 %v)
+ tail call void @llvm.ppc.set.texasru(i64 %v)
+ tail call void @llvm.ppc.set.tfhar(i64 %v)
+ tail call void @llvm.ppc.set.tfiar(i64 %v)
+ ret void
+; CHECK-LABEL: @test5
+; CHECK: mtspr 130, [[REG1:[0-9]+]]
+; CHECK: mtspr 131, [[REG2:[0-9]+]]
+; CHECK: mtspr 128, [[REG3:[0-9]+]]
+; CHECK: mtspr 129, [[REG4:[0-9]+]]
+}
+
+define i64 @test6() {
+entry:
+ %0 = tail call i64 @llvm.ppc.get.texasr()
+ ret i64 %0
+; CHECK-LABEL: @test6
+; CHECK: mfspr [[REG1:[0-9]+]], 130
+}
+
+define i64 @test7() {
+entry:
+ %0 = tail call i64 @llvm.ppc.get.texasru()
+ ret i64 %0
+; CHECK-LABEL: @test7
+; CHECK: mfspr [[REG1:[0-9]+]], 131
+}
+
+define i64 @test8() {
+entry:
+ %0 = tail call i64 @llvm.ppc.get.tfhar()
+ ret i64 %0
+; CHECK-LABEL: @test8
+; CHECK: mfspr [[REG1:[0-9]+]], 128
+}
+
+define i64 @test9() {
+entry:
+ %0 = tail call i64 @llvm.ppc.get.tfiar()
+ ret i64 %0
+; CHECK-LABEL: @test9
+; CHECK: mfspr [[REG1:[0-9]+]], 129
+}
+
+declare void @llvm.ppc.set.texasr(i64)
+declare void @llvm.ppc.set.texasru(i64)
+declare void @llvm.ppc.set.tfhar(i64)
+declare void @llvm.ppc.set.tfiar(i64)
+declare i64 @llvm.ppc.get.texasr()
+declare i64 @llvm.ppc.get.texasru()
+declare i64 @llvm.ppc.get.tfhar()
+declare i64 @llvm.ppc.get.tfiar()
diff --git a/llvm/test/MC/PowerPC/htm.s b/llvm/test/MC/PowerPC/htm.s
new file mode 100644
index 00000000000..f99ff3cd536
--- /dev/null
+++ b/llvm/test/MC/PowerPC/htm.s
@@ -0,0 +1,53 @@
+# RUN: llvm-mc -triple powerpc64-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s
+# RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s
+
+# CHECK-BE: tbegin. 0 # encoding: [0x7c,0x00,0x05,0x1d]
+# CHECK-LE: tbegin. 0 # encoding: [0x1d,0x05,0x00,0x7c]
+ tbegin. 0
+# CHECK-BE: tbegin. 1 # encoding: [0x7c,0x20,0x05,0x1d]
+# CHECK-LE: tbegin. 1 # encoding: [0x1d,0x05,0x20,0x7c]
+ tbegin. 1
+
+# CHECK-BE: tend. 0 # encoding: [0x7c,0x00,0x05,0x5d]
+# CHECK-LE: tend. 0 # encoding: [0x5d,0x05,0x00,0x7c]
+ tend. 0
+# CHECK-BE: tend. 1 # encoding: [0x7e,0x00,0x05,0x5d]
+# CHECK-LE: tend. 1 # encoding: [0x5d,0x05,0x00,0x7e]
+ tend. 1
+
+# CHECK-BE: tabort. 9 # encoding: [0x7c,0x09,0x07,0x1d]
+# CHECK-LE: tabort. 9 # encoding: [0x1d,0x07,0x09,0x7c]
+ tabort. 9
+# CHECK-BE: tabortdc. 0, 9, 9 # encoding: [0x7c,0x09,0x4e,0x5d]
+# CHECK-LE: tabortdc. 0, 9, 9 # encoding: [0x5d,0x4e,0x09,0x7c]
+ tabortdc. 0, 9, 9
+# CHECK-BE: tabortdci. 0, 9, 0 # encoding: [0x7c,0x09,0x06,0xdd]
+# CHECK-LE: tabortdci. 0, 9, 0 # encoding: [0xdd,0x06,0x09,0x7c]
+ tabortdci. 0, 9, 0
+# CHECK-BE: tabortwc. 0, 9, 9 # encoding: [0x7c,0x09,0x4e,0x1d]
+# CHECK-LE: tabortwc. 0, 9, 9 # encoding: [0x1d,0x4e,0x09,0x7c]
+ tabortwc. 0, 9, 9
+# CHECK-BE: tabortwci. 0, 9, 0 # encoding: [0x7c,0x09,0x06,0x9d]
+# CHECK-LE: tabortwci. 0, 9, 0 # encoding: [0x9d,0x06,0x09,0x7c]
+ tabortwci. 0, 9, 0
+
+# CHECK-BE: tsr. 0 # encoding: [0x7c,0x00,0x05,0xdd]
+# CHECK-LE: tsr. 0 # encoding: [0xdd,0x05,0x00,0x7c]
+ tsr. 0
+# CHECK-BE: tsr. 1 # encoding: [0x7c,0x20,0x05,0xdd]
+# CHECK-LE: tsr. 1 # encoding: [0xdd,0x05,0x20,0x7c]
+ tsr. 1
+
+# CHECK-BE: tcheck 0 # encoding: [0x7c,0x00,0x05,0x9c]
+# CHECK-LE: tcheck 0 # encoding: [0x9c,0x05,0x00,0x7c]
+ tcheck 0
+# CHECK-BE: tcheck 3 # encoding: [0x7d,0x80,0x05,0x9c]
+# CHECK-LE: tcheck 3 # encoding: [0x9c,0x05,0x80,0x7d]
+ tcheck 3
+
+# CHECK-BE: treclaim. 9 # encoding: [0x7c,0x09,0x07,0x5d]
+# CHECK-LE: treclaim. 9 # encoding: [0x5d,0x07,0x09,0x7c]
+ treclaim. 9
+# CHECK-BE: trechkpt. # encoding: [0x7c,0x00,0x07,0xdd]
+# CHECK-LE: trechkpt. # encoding: [0xdd,0x07,0x00,0x7c]
+ trechkpt.
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