diff options
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/ARM/invalid-fp-armv8.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/invalid-neon-v8.s | 6 |
2 files changed, 7 insertions, 1 deletions
diff --git a/llvm/test/MC/ARM/invalid-fp-armv8.s b/llvm/test/MC/ARM/invalid-fp-armv8.s index da952cf7ed6..dca0e448d11 100644 --- a/llvm/test/MC/ARM/invalid-fp-armv8.s +++ b/llvm/test/MC/ARM/invalid-fp-armv8.s @@ -81,7 +81,7 @@ vcvtthi.f16.f64 q0, d3 vrintrlo.f32.f32 d3, q0 @ V8: error: invalid instruction vrintxcs.f32.f32 d3, d0 -@ V8: error: instruction requires: NEON +@ V8: error: invalid instruction vrinta.f64.f64 s3, q0 @ V8: error: invalid instruction diff --git a/llvm/test/MC/ARM/invalid-neon-v8.s b/llvm/test/MC/ARM/invalid-neon-v8.s index 6403904c1d3..cae1fb331cf 100644 --- a/llvm/test/MC/ARM/invalid-neon-v8.s +++ b/llvm/test/MC/ARM/invalid-neon-v8.s @@ -72,3 +72,9 @@ vmull.p64 s1, d2, d3 @ CHECK: error: operand must be a register in range [q0, q15] vmullge.p64 q0, d16, d17 @ CHECK: error: instruction 'vmull' is not predicable, but condition code specified + +// These instructions are predicable in VFP but not in NEON +vrintzeq.f32 d0, d1 +vrintxgt.f32 d0, d1 +@ CHECK: error: invalid operand for instruction +@ CHECK: error: invalid operand for instruction |
