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-rw-r--r--llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll b/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
index 8a506c3e396..9f1e5a94138 100644
--- a/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
+++ b/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
@@ -67,7 +67,7 @@ ENDIF28: ; preds = %ENDIF
declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
; Function Attrs: readnone
-declare float @llvm.AMDIL.clamp.(float, float, float) #2
+declare float @llvm.AMDGPU.clamp.f32(float, float, float) #2
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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