1 files changed, 80 insertions, 0 deletions
diff --git a/llvm/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll b/llvm/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll
new file mode 100644
index 00000000000..e881e685555
--- /dev/null
+++ b/llvm/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll
@@ -0,0 +1,80 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -O2 -S -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux | FileCheck %s -check-prefix=CHECK
+
+define signext i32 @memcmp8(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
+; CHECK-LABEL: @memcmp8(
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i64*
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i64*
+; CHECK-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 4
+; CHECK-NEXT:    [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 4
+; CHECK-NEXT:    [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
+; CHECK-NEXT:    [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])
+; CHECK-NEXT:    [[TMP7:%.*]] = icmp ugt i64 [[TMP5]], [[TMP6]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]]
+; CHECK-NEXT:    [[TMP9:%.*]] = zext i1 [[TMP7]] to i32
+; CHECK-NEXT:    [[TMP10:%.*]] = zext i1 [[TMP8]] to i32
+; CHECK-NEXT:    [[TMP11:%.*]] = sub nsw i32 [[TMP9]], [[TMP10]]
+; CHECK-NEXT:    ret i32 [[TMP11]]
+;
+  %t0 = bitcast i32* %buffer1 to i8*
+  %t1 = bitcast i32* %buffer2 to i8*
+  %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 8)
+  ret i32 %call
+}
+
+define signext i32 @memcmp4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
+; CHECK-LABEL: @memcmp4(
+; CHECK-NEXT:    [[TMP1:%.*]] = load i32, i32* [[BUFFER1:%.*]], align 4
+; CHECK-NEXT:    [[TMP2:%.*]] = load i32, i32* [[BUFFER2:%.*]], align 4
+; CHECK-NEXT:    [[TMP3:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]])
+; CHECK-NEXT:    [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
+; CHECK-NEXT:    [[TMP5:%.*]] = icmp ugt i32 [[TMP3]], [[TMP4]]
+; CHECK-NEXT:    [[TMP6:%.*]] = icmp ult i32 [[TMP3]], [[TMP4]]
+; CHECK-NEXT:    [[TMP7:%.*]] = zext i1 [[TMP5]] to i32
+; CHECK-NEXT:    [[TMP8:%.*]] = zext i1 [[TMP6]] to i32
+; CHECK-NEXT:    [[TMP9:%.*]] = sub nsw i32 [[TMP7]], [[TMP8]]
+; CHECK-NEXT:    ret i32 [[TMP9]]
+;
+  %t0 = bitcast i32* %buffer1 to i8*
+  %t1 = bitcast i32* %buffer2 to i8*
+  %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 4)
+  ret i32 %call
+}
+
+define signext i32 @memcmp2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
+; CHECK-LABEL: @memcmp2(
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i16*
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i16*
+; CHECK-NEXT:    [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2
+; CHECK-NEXT:    [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2
+; CHECK-NEXT:    [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
+; CHECK-NEXT:    [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])
+; CHECK-NEXT:    [[TMP7:%.*]] = zext i16 [[TMP5]] to i32
+; CHECK-NEXT:    [[TMP8:%.*]] = zext i16 [[TMP6]] to i32
+; CHECK-NEXT:    [[TMP9:%.*]] = sub nsw i32 [[TMP7]], [[TMP8]]
+; CHECK-NEXT:    ret i32 [[TMP9]]
+;
+  %t0 = bitcast i32* %buffer1 to i8*
+  %t1 = bitcast i32* %buffer2 to i8*
+  %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 2)
+  ret i32 %call
+}
+
+define signext i32 @memcmp1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
+; CHECK-LABEL: @memcmp1(
+; CHECK-NEXT:    [[T0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8*
+; CHECK-NEXT:    [[T1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8*
+; CHECK-NEXT:    [[LHSC:%.*]] = load i8, i8* [[T0]], align 1
+; CHECK-NEXT:    [[LHSV:%.*]] = zext i8 [[LHSC]] to i32
+; CHECK-NEXT:    [[RHSC:%.*]] = load i8, i8* [[T1]], align 1
+; CHECK-NEXT:    [[RHSV:%.*]] = zext i8 [[RHSC]] to i32
+; CHECK-NEXT:    [[CHARDIFF:%.*]] = sub nsw i32 [[LHSV]], [[RHSV]]
+; CHECK-NEXT:    ret i32 [[CHARDIFF]]
+;
+  %t0 = bitcast i32* %buffer1 to i8*
+  %t1 = bitcast i32* %buffer2 to i8*
+  %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 1) #2
+  ret i32 %call
+}
+
+declare signext i32 @memcmp(i8*, i8*, i64)