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-rw-r--r--llvm/test/Transforms/LoopVectorize/write-only.ll23
1 files changed, 23 insertions, 0 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/write-only.ll b/llvm/test/Transforms/LoopVectorize/write-only.ll
index ae3eb2046f6..01b7414cf49 100644
--- a/llvm/test/Transforms/LoopVectorize/write-only.ll
+++ b/llvm/test/Transforms/LoopVectorize/write-only.ll
@@ -23,3 +23,26 @@ define i32 @read_mod_write_single_ptr(float* nocapture %a, i32 %n) nounwind uwta
._crit_edge: ; preds = %.lr.ph, %0
ret i32 undef
}
+
+; Ensure that volatile stores are not vectorized.
+; CHECK-LABEL: @read_mod_write_single_ptr_volatile_store(
+; CHECK-NOT: store <4 x float>
+; CHECK: ret i32
+define i32 @read_mod_write_single_ptr_volatile_store(float* nocapture %a, i32 %n) nounwind uwtable ssp {
+ %1 = icmp sgt i32 %n, 0
+ br i1 %1, label %.lr.ph, label %._crit_edge
+
+.lr.ph: ; preds = %0, %.lr.ph
+ %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
+ %2 = getelementptr inbounds float, float* %a, i64 %indvars.iv
+ %3 = load float, float* %2, align 4
+ %4 = fmul float %3, 3.000000e+00
+ store volatile float %4, float* %2, align 4
+ %indvars.iv.next = add i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, %n
+ br i1 %exitcond, label %._crit_edge, label %.lr.ph
+
+._crit_edge: ; preds = %.lr.ph, %0
+ ret i32 undef
+}
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