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-rw-r--r--llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll6
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll b/llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
index d9c9632be04..be4d2f90291 100644
--- a/llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
@@ -33,9 +33,8 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; CHECK: %mul = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 {{.*}}, i8 {{.*}})
; CHECK-NOT: %mul = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 {{.*}}, i8 {{.*}})
; CHECK: %[[TEST:[0-9]+]] = or i1 {{.*}}, %mul.overflow
-; CHECK: %[[NTEST:[0-9]+]] = or i1 false, %[[TEST]]
; CHECK: %ident.check = icmp ne i32 {{.*}}, %{{.*}}
-; CHECK: %{{.*}} = or i1 %[[NTEST]], %ident.check
+; CHECK: %{{.*}} = or i1 %[[TEST]], %ident.check
; CHECK-NOT: %mul = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 {{.*}}, i8 {{.*}})
; CHECK: vector.body:
; CHECK: <4 x i32>
@@ -92,10 +91,9 @@ for.end:
; CHECK: %mul = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 {{.*}}, i8 {{.*}})
; CHECK-NOT: %mul = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 {{.*}}, i8 {{.*}})
; CHECK: %[[TEST:[0-9]+]] = or i1 {{.*}}, %mul.overflow
-; CHECK: %[[NTEST:[0-9]+]] = or i1 false, %[[TEST]]
; CHECK: %[[EXT:[0-9]+]] = sext i8 {{.*}} to i32
; CHECK: %ident.check = icmp ne i32 {{.*}}, %[[EXT]]
-; CHECK: %{{.*}} = or i1 %[[NTEST]], %ident.check
+; CHECK: %{{.*}} = or i1 %[[TEST]], %ident.check
; CHECK-NOT: %mul = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 {{.*}}, i8 {{.*}})
; CHECK: vector.body:
; CHECK: <4 x i32>
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