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Diffstat (limited to 'llvm/test/Transforms/InstCombine/select-bitext.ll')
-rw-r--r--llvm/test/Transforms/InstCombine/select-bitext.ll196
1 files changed, 98 insertions, 98 deletions
diff --git a/llvm/test/Transforms/InstCombine/select-bitext.ll b/llvm/test/Transforms/InstCombine/select-bitext.ll
index b66a9eef4ab..07d34b49b0b 100644
--- a/llvm/test/Transforms/InstCombine/select-bitext.ll
+++ b/llvm/test/Transforms/InstCombine/select-bitext.ll
@@ -5,7 +5,7 @@
define i16 @sel_sext_constants(i1 %cmp) {
; CHECK-LABEL: @sel_sext_constants(
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i16 -1, i16 42
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i16 -1, i16 42
; CHECK-NEXT: ret i16 [[EXT]]
;
%sel = select i1 %cmp, i8 255, i8 42
@@ -15,7 +15,7 @@ define i16 @sel_sext_constants(i1 %cmp) {
define i16 @sel_zext_constants(i1 %cmp) {
; CHECK-LABEL: @sel_zext_constants(
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i16 255, i16 42
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i16 255, i16 42
; CHECK-NEXT: ret i16 [[EXT]]
;
%sel = select i1 %cmp, i8 255, i8 42
@@ -25,7 +25,7 @@ define i16 @sel_zext_constants(i1 %cmp) {
define double @sel_fpext_constants(i1 %cmp) {
; CHECK-LABEL: @sel_fpext_constants(
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, double -2.550000e+02, double 4.200000e+01
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], double -2.550000e+02, double 4.200000e+01
; CHECK-NEXT: ret double [[EXT]]
;
%sel = select i1 %cmp, float -255.0, float 42.0
@@ -37,8 +37,8 @@ define double @sel_fpext_constants(i1 %cmp) {
define i64 @sel_sext(i32 %a, i1 %cmp) {
; CHECK-LABEL: @sel_sext(
-; CHECK-NEXT: [[TMP1:%.*]] = sext i32 %a to i64
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i64 [[TMP1]], i64 42
+; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i64 [[TMP1]], i64 42
; CHECK-NEXT: ret i64 [[EXT]]
;
%sel = select i1 %cmp, i32 %a, i32 42
@@ -48,8 +48,8 @@ define i64 @sel_sext(i32 %a, i1 %cmp) {
define <4 x i64> @sel_sext_vec(<4 x i32> %a, <4 x i1> %cmp) {
; CHECK-LABEL: @sel_sext_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = sext <4 x i32> %a to <4 x i64>
-; CHECK-NEXT: [[EXT:%.*]] = select <4 x i1> %cmp, <4 x i64> [[TMP1]], <4 x i64> <i64 42, i64 42, i64 42, i64 42>
+; CHECK-NEXT: [[TMP1:%.*]] = sext <4 x i32> [[A:%.*]] to <4 x i64>
+; CHECK-NEXT: [[EXT:%.*]] = select <4 x i1> [[CMP:%.*]], <4 x i64> [[TMP1]], <4 x i64> <i64 42, i64 42, i64 42, i64 42>
; CHECK-NEXT: ret <4 x i64> [[EXT]]
;
%sel = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> <i32 42, i32 42, i32 42, i32 42>
@@ -59,8 +59,8 @@ define <4 x i64> @sel_sext_vec(<4 x i32> %a, <4 x i1> %cmp) {
define i64 @sel_zext(i32 %a, i1 %cmp) {
; CHECK-LABEL: @sel_zext(
-; CHECK-NEXT: [[TMP1:%.*]] = zext i32 %a to i64
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i64 [[TMP1]], i64 42
+; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i64 [[TMP1]], i64 42
; CHECK-NEXT: ret i64 [[EXT]]
;
%sel = select i1 %cmp, i32 %a, i32 42
@@ -70,8 +70,8 @@ define i64 @sel_zext(i32 %a, i1 %cmp) {
define <4 x i64> @sel_zext_vec(<4 x i32> %a, <4 x i1> %cmp) {
; CHECK-LABEL: @sel_zext_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i32> %a to <4 x i64>
-; CHECK-NEXT: [[EXT:%.*]] = select <4 x i1> %cmp, <4 x i64> [[TMP1]], <4 x i64> <i64 42, i64 42, i64 42, i64 42>
+; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i32> [[A:%.*]] to <4 x i64>
+; CHECK-NEXT: [[EXT:%.*]] = select <4 x i1> [[CMP:%.*]], <4 x i64> [[TMP1]], <4 x i64> <i64 42, i64 42, i64 42, i64 42>
; CHECK-NEXT: ret <4 x i64> [[EXT]]
;
%sel = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> <i32 42, i32 42, i32 42, i32 42>
@@ -85,9 +85,9 @@ define <4 x i64> @sel_zext_vec(<4 x i32> %a, <4 x i1> %cmp) {
define i64 @trunc_sel_larger_sext(i32 %a, i1 %cmp) {
; CHECK-LABEL: @trunc_sel_larger_sext(
-; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %a to i16
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[A:%.*]] to i16
; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[TRUNC]] to i64
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i64 [[TMP1]], i64 42
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i64 [[TMP1]], i64 42
; CHECK-NEXT: ret i64 [[EXT]]
;
%trunc = trunc i32 %a to i16
@@ -98,10 +98,10 @@ define i64 @trunc_sel_larger_sext(i32 %a, i1 %cmp) {
define <2 x i64> @trunc_sel_larger_sext_vec(<2 x i32> %a, <2 x i1> %cmp) {
; CHECK-LABEL: @trunc_sel_larger_sext_vec(
-; CHECK-NEXT: [[TRUNC:%.*]] = zext <2 x i32> %a to <2 x i64>
+; CHECK-NEXT: [[TRUNC:%.*]] = zext <2 x i32> [[A:%.*]] to <2 x i64>
; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i64> [[TRUNC]], <i64 48, i64 48>
; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i64> [[SEXT]], <i64 48, i64 48>
-; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i64> [[TMP1]], <2 x i64> <i64 42, i64 43>
+; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i64> [[TMP1]], <2 x i64> <i64 42, i64 43>
; CHECK-NEXT: ret <2 x i64> [[EXT]]
;
%trunc = trunc <2 x i32> %a to <2 x i16>
@@ -112,9 +112,9 @@ define <2 x i64> @trunc_sel_larger_sext_vec(<2 x i32> %a, <2 x i1> %cmp) {
define i32 @trunc_sel_smaller_sext(i64 %a, i1 %cmp) {
; CHECK-LABEL: @trunc_sel_smaller_sext(
-; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 %a to i16
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[A:%.*]] to i16
; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[TRUNC]] to i32
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i32 [[TMP1]], i32 42
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i32 [[TMP1]], i32 42
; CHECK-NEXT: ret i32 [[EXT]]
;
%trunc = trunc i64 %a to i16
@@ -125,10 +125,10 @@ define i32 @trunc_sel_smaller_sext(i64 %a, i1 %cmp) {
define <2 x i32> @trunc_sel_smaller_sext_vec(<2 x i64> %a, <2 x i1> %cmp) {
; CHECK-LABEL: @trunc_sel_smaller_sext_vec(
-; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> %a to <2 x i32>
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[A:%.*]] to <2 x i32>
; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i32> [[TRUNC]], <i32 16, i32 16>
; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i32> [[SEXT]], <i32 16, i32 16>
-; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
+; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
; CHECK-NEXT: ret <2 x i32> [[EXT]]
;
%trunc = trunc <2 x i64> %a to <2 x i16>
@@ -139,9 +139,9 @@ define <2 x i32> @trunc_sel_smaller_sext_vec(<2 x i64> %a, <2 x i1> %cmp) {
define i32 @trunc_sel_equal_sext(i32 %a, i1 %cmp) {
; CHECK-LABEL: @trunc_sel_equal_sext(
-; CHECK-NEXT: [[SEXT:%.*]] = shl i32 %a, 16
-; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i32 [[SEXT]], 16
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i32 [[TMP1]], i32 42
+; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[A:%.*]], 16
+; CHECK-NEXT: [[TMP2:%.*]] = ashr exact i32 [[TMP1]], 16
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i32 [[TMP2]], i32 42
; CHECK-NEXT: ret i32 [[EXT]]
;
%trunc = trunc i32 %a to i16
@@ -152,9 +152,9 @@ define i32 @trunc_sel_equal_sext(i32 %a, i1 %cmp) {
define <2 x i32> @trunc_sel_equal_sext_vec(<2 x i32> %a, <2 x i1> %cmp) {
; CHECK-LABEL: @trunc_sel_equal_sext_vec(
-; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i32> %a, <i32 16, i32 16>
+; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i32> [[A:%.*]], <i32 16, i32 16>
; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i32> [[SEXT]], <i32 16, i32 16>
-; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
+; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
; CHECK-NEXT: ret <2 x i32> [[EXT]]
;
%trunc = trunc <2 x i32> %a to <2 x i16>
@@ -165,9 +165,9 @@ define <2 x i32> @trunc_sel_equal_sext_vec(<2 x i32> %a, <2 x i1> %cmp) {
define i64 @trunc_sel_larger_zext(i32 %a, i1 %cmp) {
; CHECK-LABEL: @trunc_sel_larger_zext(
-; CHECK-NEXT: [[TRUNC_MASK:%.*]] = and i32 %a, 65535
+; CHECK-NEXT: [[TRUNC_MASK:%.*]] = and i32 [[A:%.*]], 65535
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TRUNC_MASK]] to i64
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i64 [[TMP1]], i64 42
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i64 [[TMP1]], i64 42
; CHECK-NEXT: ret i64 [[EXT]]
;
%trunc = trunc i32 %a to i16
@@ -178,9 +178,9 @@ define i64 @trunc_sel_larger_zext(i32 %a, i1 %cmp) {
define <2 x i64> @trunc_sel_larger_zext_vec(<2 x i32> %a, <2 x i1> %cmp) {
; CHECK-LABEL: @trunc_sel_larger_zext_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> %a, <i32 65535, i32 65535>
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], <i32 65535, i32 65535>
; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>
-; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i64> [[TMP2]], <2 x i64> <i64 42, i64 43>
+; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i64> [[TMP2]], <2 x i64> <i64 42, i64 43>
; CHECK-NEXT: ret <2 x i64> [[EXT]]
;
%trunc = trunc <2 x i32> %a to <2 x i16>
@@ -191,9 +191,9 @@ define <2 x i64> @trunc_sel_larger_zext_vec(<2 x i32> %a, <2 x i1> %cmp) {
define i32 @trunc_sel_smaller_zext(i64 %a, i1 %cmp) {
; CHECK-LABEL: @trunc_sel_smaller_zext(
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %a to i32
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[A:%.*]] to i32
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 65535
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i32 [[TMP2]], i32 42
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i32 [[TMP2]], i32 42
; CHECK-NEXT: ret i32 [[EXT]]
;
%trunc = trunc i64 %a to i16
@@ -204,9 +204,9 @@ define i32 @trunc_sel_smaller_zext(i64 %a, i1 %cmp) {
define <2 x i32> @trunc_sel_smaller_zext_vec(<2 x i64> %a, <2 x i1> %cmp) {
; CHECK-LABEL: @trunc_sel_smaller_zext_vec(
-; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> %a to <2 x i32>
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[A:%.*]] to <2 x i32>
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[TRUNC]], <i32 65535, i32 65535>
-; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
+; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
; CHECK-NEXT: ret <2 x i32> [[EXT]]
;
%trunc = trunc <2 x i64> %a to <2 x i16>
@@ -217,8 +217,8 @@ define <2 x i32> @trunc_sel_smaller_zext_vec(<2 x i64> %a, <2 x i1> %cmp) {
define i32 @trunc_sel_equal_zext(i32 %a, i1 %cmp) {
; CHECK-LABEL: @trunc_sel_equal_zext(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, 65535
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i32 [[TMP1]], i32 42
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 65535
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], i32 [[TMP1]], i32 42
; CHECK-NEXT: ret i32 [[EXT]]
;
%trunc = trunc i32 %a to i16
@@ -229,8 +229,8 @@ define i32 @trunc_sel_equal_zext(i32 %a, i1 %cmp) {
define <2 x i32> @trunc_sel_equal_zext_vec(<2 x i32> %a, <2 x i1> %cmp) {
; CHECK-LABEL: @trunc_sel_equal_zext_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> %a, <i32 65535, i32 65535>
-; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], <i32 65535, i32 65535>
+; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x i32> [[TMP1]], <2 x i32> <i32 42, i32 43>
; CHECK-NEXT: ret <2 x i32> [[EXT]]
;
%trunc = trunc <2 x i32> %a to <2 x i16>
@@ -241,9 +241,9 @@ define <2 x i32> @trunc_sel_equal_zext_vec(<2 x i32> %a, <2 x i1> %cmp) {
define double @trunc_sel_larger_fpext(float %a, i1 %cmp) {
; CHECK-LABEL: @trunc_sel_larger_fpext(
-; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc float %a to half
+; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TRUNC]] to double
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, double [[TMP1]], double 4.200000e+01
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], double [[TMP1]], double 4.200000e+01
; CHECK-NEXT: ret double [[EXT]]
;
%trunc = fptrunc float %a to half
@@ -254,9 +254,9 @@ define double @trunc_sel_larger_fpext(float %a, i1 %cmp) {
define <2 x double> @trunc_sel_larger_fpext_vec(<2 x float> %a, <2 x i1> %cmp) {
; CHECK-LABEL: @trunc_sel_larger_fpext_vec(
-; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x float> %a to <2 x half>
+; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x float> [[A:%.*]] to <2 x half>
; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x half> [[TRUNC]] to <2 x double>
-; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x double> [[TMP1]], <2 x double> <double 4.200000e+01, double 4.300000e+01>
+; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x double> [[TMP1]], <2 x double> <double 4.200000e+01, double 4.300000e+01>
; CHECK-NEXT: ret <2 x double> [[EXT]]
;
%trunc = fptrunc <2 x float> %a to <2 x half>
@@ -267,9 +267,9 @@ define <2 x double> @trunc_sel_larger_fpext_vec(<2 x float> %a, <2 x i1> %cmp) {
define float @trunc_sel_smaller_fpext(double %a, i1 %cmp) {
; CHECK-LABEL: @trunc_sel_smaller_fpext(
-; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc double %a to half
+; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc double [[A:%.*]] to half
; CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TRUNC]] to float
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, float [[TMP1]], float 4.200000e+01
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], float [[TMP1]], float 4.200000e+01
; CHECK-NEXT: ret float [[EXT]]
;
%trunc = fptrunc double %a to half
@@ -280,9 +280,9 @@ define float @trunc_sel_smaller_fpext(double %a, i1 %cmp) {
define <2 x float> @trunc_sel_smaller_fpext_vec(<2 x double> %a, <2 x i1> %cmp) {
; CHECK-LABEL: @trunc_sel_smaller_fpext_vec(
-; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x double> %a to <2 x half>
+; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x double> [[A:%.*]] to <2 x half>
; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x half> [[TRUNC]] to <2 x float>
-; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x float> [[TMP1]], <2 x float> <float 4.200000e+01, float 4.300000e+01>
+; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x float> [[TMP1]], <2 x float> <float 4.200000e+01, float 4.300000e+01>
; CHECK-NEXT: ret <2 x float> [[EXT]]
;
%trunc = fptrunc <2 x double> %a to <2 x half>
@@ -293,9 +293,9 @@ define <2 x float> @trunc_sel_smaller_fpext_vec(<2 x double> %a, <2 x i1> %cmp)
define float @trunc_sel_equal_fpext(float %a, i1 %cmp) {
; CHECK-LABEL: @trunc_sel_equal_fpext(
-; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc float %a to half
+; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc float [[A:%.*]] to half
; CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TRUNC]] to float
-; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, float [[TMP1]], float 4.200000e+01
+; CHECK-NEXT: [[EXT:%.*]] = select i1 [[CMP:%.*]], float [[TMP1]], float 4.200000e+01
; CHECK-NEXT: ret float [[EXT]]
;
%trunc = fptrunc float %a to half
@@ -306,9 +306,9 @@ define float @trunc_sel_equal_fpext(float %a, i1 %cmp) {
define <2 x float> @trunc_sel_equal_fpext_vec(<2 x float> %a, <2 x i1> %cmp) {
; CHECK-LABEL: @trunc_sel_equal_fpext_vec(
-; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x float> %a to <2 x half>
+; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x float> [[A:%.*]] to <2 x half>
; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x half> [[TRUNC]] to <2 x float>
-; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x float> [[TMP1]], <2 x float> <float 4.200000e+01, float 4.300000e+01>
+; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> [[CMP:%.*]], <2 x float> [[TMP1]], <2 x float> <float 4.200000e+01, float 4.300000e+01>
; CHECK-NEXT: ret <2 x float> [[EXT]]
;
%trunc = fptrunc <2 x float> %a to <2 x half>
@@ -319,8 +319,8 @@ define <2 x float> @trunc_sel_equal_fpext_vec(<2 x float> %a, <2 x i1> %cmp) {
define i32 @test_sext1(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_sext1(
-; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 %ccb, %cca
-; CHECK-NEXT: [[R:%.*]] = sext i1 [[FOLD_R]] to i32
+; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%ccax = sext i1 %cca to i32
@@ -330,8 +330,8 @@ define i32 @test_sext1(i1 %cca, i1 %ccb) {
define i32 @test_sext2(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_sext2(
-; CHECK-NEXT: [[FOLD_R:%.*]] = or i1 %ccb, %cca
-; CHECK-NEXT: [[R:%.*]] = sext i1 [[FOLD_R]] to i32
+; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%ccax = sext i1 %cca to i32
@@ -341,9 +341,9 @@ define i32 @test_sext2(i1 %cca, i1 %ccb) {
define i32 @test_sext3(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_sext3(
-; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 %ccb, true
-; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 [[NOT_CCB]], %cca
-; CHECK-NEXT: [[R:%.*]] = sext i1 [[FOLD_R]] to i32
+; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
+; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[NOT_CCB]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%ccax = sext i1 %cca to i32
@@ -353,9 +353,9 @@ define i32 @test_sext3(i1 %cca, i1 %ccb) {
define i32 @test_sext4(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_sext4(
-; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 %ccb, true
-; CHECK-NEXT: [[FOLD_R:%.*]] = or i1 [[NOT_CCB]], %cca
-; CHECK-NEXT: [[R:%.*]] = sext i1 [[FOLD_R]] to i32
+; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
+; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[NOT_CCB]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%ccax = sext i1 %cca to i32
@@ -365,8 +365,8 @@ define i32 @test_sext4(i1 %cca, i1 %ccb) {
define i32 @test_zext1(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_zext1(
-; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 %ccb, %cca
-; CHECK-NEXT: [[R:%.*]] = zext i1 [[FOLD_R]] to i32
+; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%ccax = zext i1 %cca to i32
@@ -376,8 +376,8 @@ define i32 @test_zext1(i1 %cca, i1 %ccb) {
define i32 @test_zext2(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_zext2(
-; CHECK-NEXT: [[FOLD_R:%.*]] = or i1 %ccb, %cca
-; CHECK-NEXT: [[R:%.*]] = zext i1 [[FOLD_R]] to i32
+; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%ccax = zext i1 %cca to i32
@@ -387,9 +387,9 @@ define i32 @test_zext2(i1 %cca, i1 %ccb) {
define i32 @test_zext3(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_zext3(
-; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 %ccb, true
-; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 [[NOT_CCB]], %cca
-; CHECK-NEXT: [[R:%.*]] = zext i1 [[FOLD_R]] to i32
+; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
+; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[NOT_CCB]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%ccax = zext i1 %cca to i32
@@ -399,9 +399,9 @@ define i32 @test_zext3(i1 %cca, i1 %ccb) {
define i32 @test_zext4(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_zext4(
-; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 %ccb, true
-; CHECK-NEXT: [[FOLD_R:%.*]] = or i1 [[NOT_CCB]], %cca
-; CHECK-NEXT: [[R:%.*]] = zext i1 [[FOLD_R]] to i32
+; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
+; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[NOT_CCB]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%ccax = zext i1 %cca to i32
@@ -411,8 +411,8 @@ define i32 @test_zext4(i1 %cca, i1 %ccb) {
define i32 @test_negative_sext(i1 %a, i1 %cc) {
; CHECK-LABEL: @test_negative_sext(
-; CHECK-NEXT: [[A_EXT:%.*]] = sext i1 %a to i32
-; CHECK-NEXT: [[R:%.*]] = select i1 %cc, i32 [[A_EXT]], i32 1
+; CHECK-NEXT: [[A_EXT:%.*]] = sext i1 [[A:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CC:%.*]], i32 [[A_EXT]], i32 1
; CHECK-NEXT: ret i32 [[R]]
;
%a.ext = sext i1 %a to i32
@@ -422,8 +422,8 @@ define i32 @test_negative_sext(i1 %a, i1 %cc) {
define i32 @test_negative_zext(i1 %a, i1 %cc) {
; CHECK-LABEL: @test_negative_zext(
-; CHECK-NEXT: [[A_EXT:%.*]] = zext i1 %a to i32
-; CHECK-NEXT: [[R:%.*]] = select i1 %cc, i32 [[A_EXT]], i32 -1
+; CHECK-NEXT: [[A_EXT:%.*]] = zext i1 [[A:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CC:%.*]], i32 [[A_EXT]], i32 -1
; CHECK-NEXT: ret i32 [[R]]
;
%a.ext = zext i1 %a to i32
@@ -433,8 +433,8 @@ define i32 @test_negative_zext(i1 %a, i1 %cc) {
define i32 @test_bits_sext(i8 %a, i1 %cc) {
; CHECK-LABEL: @test_bits_sext(
-; CHECK-NEXT: [[A_EXT:%.*]] = sext i8 %a to i32
-; CHECK-NEXT: [[R:%.*]] = select i1 %cc, i32 [[A_EXT]], i32 -128
+; CHECK-NEXT: [[A_EXT:%.*]] = sext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CC:%.*]], i32 [[A_EXT]], i32 -128
; CHECK-NEXT: ret i32 [[R]]
;
%a.ext = sext i8 %a to i32
@@ -444,8 +444,8 @@ define i32 @test_bits_sext(i8 %a, i1 %cc) {
define i32 @test_bits_zext(i8 %a, i1 %cc) {
; CHECK-LABEL: @test_bits_zext(
-; CHECK-NEXT: [[A_EXT:%.*]] = zext i8 %a to i32
-; CHECK-NEXT: [[R:%.*]] = select i1 %cc, i32 [[A_EXT]], i32 255
+; CHECK-NEXT: [[A_EXT:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CC:%.*]], i32 [[A_EXT]], i32 255
; CHECK-NEXT: ret i32 [[R]]
;
%a.ext = zext i8 %a to i32
@@ -455,11 +455,11 @@ define i32 @test_bits_zext(i8 %a, i1 %cc) {
define i32 @test_op_op(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @test_op_op(
-; CHECK-NEXT: [[CCA:%.*]] = icmp sgt i32 %a, 0
-; CHECK-NEXT: [[CCB:%.*]] = icmp sgt i32 %b, 0
-; CHECK-NEXT: [[CCC:%.*]] = icmp sgt i32 %c, 0
+; CHECK-NEXT: [[CCA:%.*]] = icmp sgt i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CCB:%.*]] = icmp sgt i32 [[B:%.*]], 0
+; CHECK-NEXT: [[CCC:%.*]] = icmp sgt i32 [[C:%.*]], 0
; CHECK-NEXT: [[R_V:%.*]] = select i1 [[CCC]], i1 [[CCA]], i1 [[CCB]]
-; CHECK-NEXT: [[R:%.*]] = sext i1 [[R:%.*]].v to i32
+; CHECK-NEXT: [[R:%.*]] = sext i1 [[R_V]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%cca = icmp sgt i32 %a, 0
@@ -473,8 +473,8 @@ define i32 @test_op_op(i32 %a, i32 %b, i32 %c) {
define <2 x i32> @test_vectors_sext(<2 x i1> %cca, <2 x i1> %ccb) {
; CHECK-LABEL: @test_vectors_sext(
-; CHECK-NEXT: [[FOLD_R:%.*]] = and <2 x i1> %ccb, %cca
-; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[FOLD_R]] to <2 x i32>
+; CHECK-NEXT: [[NARROW:%.*]] = and <2 x i1> [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%ccax = sext <2 x i1> %cca to <2 x i32>
@@ -484,7 +484,7 @@ define <2 x i32> @test_vectors_sext(<2 x i1> %cca, <2 x i1> %ccb) {
define <2 x i32> @test_vectors_sext_nonsplat(<2 x i1> %cca, <2 x i1> %ccb) {
; CHECK-LABEL: @test_vectors_sext_nonsplat(
-; CHECK-NEXT: [[NARROW:%.*]] = select <2 x i1> %ccb, <2 x i1> %cca, <2 x i1> <i1 false, i1 true>
+; CHECK-NEXT: [[NARROW:%.*]] = select <2 x i1> [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> <i1 false, i1 true>
; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
@@ -495,8 +495,8 @@ define <2 x i32> @test_vectors_sext_nonsplat(<2 x i1> %cca, <2 x i1> %ccb) {
define <2 x i32> @test_vectors_zext(<2 x i1> %cca, <2 x i1> %ccb) {
; CHECK-LABEL: @test_vectors_zext(
-; CHECK-NEXT: [[FOLD_R:%.*]] = and <2 x i1> %ccb, %cca
-; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[FOLD_R]] to <2 x i32>
+; CHECK-NEXT: [[NARROW:%.*]] = and <2 x i1> [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[NARROW]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%ccax = zext <2 x i1> %cca to <2 x i32>
@@ -506,7 +506,7 @@ define <2 x i32> @test_vectors_zext(<2 x i1> %cca, <2 x i1> %ccb) {
define <2 x i32> @test_vectors_zext_nonsplat(<2 x i1> %cca, <2 x i1> %ccb) {
; CHECK-LABEL: @test_vectors_zext_nonsplat(
-; CHECK-NEXT: [[NARROW:%.*]] = select <2 x i1> %ccb, <2 x i1> %cca, <2 x i1> <i1 true, i1 false>
+; CHECK-NEXT: [[NARROW:%.*]] = select <2 x i1> [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> <i1 true, i1 false>
; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[NARROW]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
@@ -517,8 +517,8 @@ define <2 x i32> @test_vectors_zext_nonsplat(<2 x i1> %cca, <2 x i1> %ccb) {
define <2 x i32> @scalar_select_of_vectors_sext(<2 x i1> %cca, i1 %ccb) {
; CHECK-LABEL: @scalar_select_of_vectors_sext(
-; CHECK-NEXT: [[FOLD_R:%.*]] = select i1 %ccb, <2 x i1> %cca, <2 x i1> zeroinitializer
-; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[FOLD_R]] to <2 x i32>
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> zeroinitializer
+; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%ccax = sext <2 x i1> %cca to <2 x i32>
@@ -528,8 +528,8 @@ define <2 x i32> @scalar_select_of_vectors_sext(<2 x i1> %cca, i1 %ccb) {
define <2 x i32> @scalar_select_of_vectors_zext(<2 x i1> %cca, i1 %ccb) {
; CHECK-LABEL: @scalar_select_of_vectors_zext(
-; CHECK-NEXT: [[FOLD_R:%.*]] = select i1 %ccb, <2 x i1> %cca, <2 x i1> zeroinitializer
-; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[FOLD_R]] to <2 x i32>
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> zeroinitializer
+; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[NARROW]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%ccax = zext <2 x i1> %cca to <2 x i32>
@@ -539,7 +539,7 @@ define <2 x i32> @scalar_select_of_vectors_zext(<2 x i1> %cca, i1 %ccb) {
define i32 @sext_true_val_must_be_all_ones(i1 %x) {
; CHECK-LABEL: @sext_true_val_must_be_all_ones(
-; CHECK-NEXT: [[SEL:%.*]] = select i1 %x, i32 -1, i32 42, !prof !0
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], i32 -1, i32 42, !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%ext = sext i1 %x to i32
@@ -549,7 +549,7 @@ define i32 @sext_true_val_must_be_all_ones(i1 %x) {
define <2 x i32> @sext_true_val_must_be_all_ones_vec(<2 x i1> %x) {
; CHECK-LABEL: @sext_true_val_must_be_all_ones_vec(
-; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> %x, <2 x i32> <i32 -1, i32 -1>, <2 x i32> <i32 42, i32 12>, !prof !0
+; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 -1, i32 -1>, <2 x i32> <i32 42, i32 12>, !prof !0
; CHECK-NEXT: ret <2 x i32> [[SEL]]
;
%ext = sext <2 x i1> %x to <2 x i32>
@@ -559,7 +559,7 @@ define <2 x i32> @sext_true_val_must_be_all_ones_vec(<2 x i1> %x) {
define i32 @zext_true_val_must_be_one(i1 %x) {
; CHECK-LABEL: @zext_true_val_must_be_one(
-; CHECK-NEXT: [[SEL:%.*]] = select i1 %x, i32 1, i32 42, !prof !0
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], i32 1, i32 42, !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%ext = zext i1 %x to i32
@@ -569,7 +569,7 @@ define i32 @zext_true_val_must_be_one(i1 %x) {
define <2 x i32> @zext_true_val_must_be_one_vec(<2 x i1> %x) {
; CHECK-LABEL: @zext_true_val_must_be_one_vec(
-; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> %x, <2 x i32> <i32 1, i32 1>, <2 x i32> <i32 42, i32 12>, !prof !0
+; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 1, i32 1>, <2 x i32> <i32 42, i32 12>, !prof !0
; CHECK-NEXT: ret <2 x i32> [[SEL]]
;
%ext = zext <2 x i1> %x to <2 x i32>
@@ -579,7 +579,7 @@ define <2 x i32> @zext_true_val_must_be_one_vec(<2 x i1> %x) {
define i32 @sext_false_val_must_be_zero(i1 %x) {
; CHECK-LABEL: @sext_false_val_must_be_zero(
-; CHECK-NEXT: [[SEL:%.*]] = select i1 %x, i32 42, i32 0, !prof !0
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], i32 42, i32 0, !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%ext = sext i1 %x to i32
@@ -589,7 +589,7 @@ define i32 @sext_false_val_must_be_zero(i1 %x) {
define <2 x i32> @sext_false_val_must_be_zero_vec(<2 x i1> %x) {
; CHECK-LABEL: @sext_false_val_must_be_zero_vec(
-; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> %x, <2 x i32> <i32 42, i32 12>, <2 x i32> zeroinitializer, !prof !0
+; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 42, i32 12>, <2 x i32> zeroinitializer, !prof !0
; CHECK-NEXT: ret <2 x i32> [[SEL]]
;
%ext = sext <2 x i1> %x to <2 x i32>
@@ -599,7 +599,7 @@ define <2 x i32> @sext_false_val_must_be_zero_vec(<2 x i1> %x) {
define i32 @zext_false_val_must_be_zero(i1 %x) {
; CHECK-LABEL: @zext_false_val_must_be_zero(
-; CHECK-NEXT: [[SEL:%.*]] = select i1 %x, i32 42, i32 0, !prof !0
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], i32 42, i32 0, !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%ext = zext i1 %x to i32
@@ -609,7 +609,7 @@ define i32 @zext_false_val_must_be_zero(i1 %x) {
define <2 x i32> @zext_false_val_must_be_zero_vec(<2 x i1> %x) {
; CHECK-LABEL: @zext_false_val_must_be_zero_vec(
-; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> %x, <2 x i32> <i32 42, i32 12>, <2 x i32> zeroinitializer, !prof !0
+; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 42, i32 12>, <2 x i32> zeroinitializer, !prof !0
; CHECK-NEXT: ret <2 x i32> [[SEL]]
;
%ext = zext <2 x i1> %x to <2 x i32>
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