diff options
Diffstat (limited to 'llvm/test/Transforms/InstCombine/select-bitext-bitwise-ops.ll')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/select-bitext-bitwise-ops.ll | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/llvm/test/Transforms/InstCombine/select-bitext-bitwise-ops.ll b/llvm/test/Transforms/InstCombine/select-bitext-bitwise-ops.ll index 7771d75cc9e..0e4574f1c62 100644 --- a/llvm/test/Transforms/InstCombine/select-bitext-bitwise-ops.ll +++ b/llvm/test/Transforms/InstCombine/select-bitext-bitwise-ops.ll @@ -1,13 +1,14 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt -S -instcombine < %s | FileCheck %s define i64 @sel_false_val_is_a_masked_shl_of_true_val1(i32 %x, i64 %y) { ; CHECK-LABEL: @sel_false_val_is_a_masked_shl_of_true_val1( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, 15 +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15 ; CHECK-NEXT: [[TMP2:%.*]] = shl nuw nsw i32 [[TMP1]], 2 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i64 0, i64 [[TMP3]] -; CHECK-NEXT: [[TMP6:%.*]] = ashr i64 %y, [[TMP5]] +; CHECK-NEXT: [[TMP6:%.*]] = ashr i64 [[Y:%.*]], [[TMP5]] ; CHECK-NEXT: ret i64 [[TMP6]] ; %1 = and i32 %x, 15 @@ -21,10 +22,10 @@ define i64 @sel_false_val_is_a_masked_shl_of_true_val1(i32 %x, i64 %y) { define i64 @sel_false_val_is_a_masked_shl_of_true_val2(i32 %x, i64 %y) { ; CHECK-LABEL: @sel_false_val_is_a_masked_shl_of_true_val2( -; CHECK-NEXT: [[TMP1:%.*]] = shl i32 %x, 2 +; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[X:%.*]], 2 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 60 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 %y, [[TMP3]] +; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]] ; CHECK-NEXT: ret i64 [[TMP4]] ; %1 = and i32 %x, 15 @@ -38,12 +39,12 @@ define i64 @sel_false_val_is_a_masked_shl_of_true_val2(i32 %x, i64 %y) { define i64 @sel_false_val_is_a_masked_lshr_of_true_val1(i32 %x, i64 %y) { ; CHECK-LABEL: @sel_false_val_is_a_masked_lshr_of_true_val1( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, 60 +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 60 ; CHECK-NEXT: [[TMP2:%.*]] = lshr exact i32 [[TMP1]], 2 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i64 0, i64 [[TMP3]] -; CHECK-NEXT: [[TMP6:%.*]] = ashr i64 %y, [[TMP5]] +; CHECK-NEXT: [[TMP6:%.*]] = ashr i64 [[Y:%.*]], [[TMP5]] ; CHECK-NEXT: ret i64 [[TMP6]] ; %1 = and i32 %x, 60 @@ -57,10 +58,10 @@ define i64 @sel_false_val_is_a_masked_lshr_of_true_val1(i32 %x, i64 %y) { define i64 @sel_false_val_is_a_masked_lshr_of_true_val2(i32 %x, i64 %y) { ; CHECK-LABEL: @sel_false_val_is_a_masked_lshr_of_true_val2( -; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 %x, 2 +; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 2 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 15 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 %y, [[TMP3]] +; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]] ; CHECK-NEXT: ret i64 [[TMP4]] ; %1 = and i32 %x, 60 @@ -74,12 +75,12 @@ define i64 @sel_false_val_is_a_masked_lshr_of_true_val2(i32 %x, i64 %y) { define i64 @sel_false_val_is_a_masked_ashr_of_true_val1(i32 %x, i64 %y) { ; CHECK-LABEL: @sel_false_val_is_a_masked_ashr_of_true_val1( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, -2147483588 +; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2147483588 ; CHECK-NEXT: [[TMP2:%.*]] = ashr exact i32 [[TMP1]], 2 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP1]], 0 ; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i64 0, i64 [[TMP3]] -; CHECK-NEXT: [[TMP6:%.*]] = ashr i64 %y, [[TMP5]] +; CHECK-NEXT: [[TMP6:%.*]] = ashr i64 [[Y:%.*]], [[TMP5]] ; CHECK-NEXT: ret i64 [[TMP6]] ; %1 = and i32 %x, -2147483588 @@ -93,10 +94,10 @@ define i64 @sel_false_val_is_a_masked_ashr_of_true_val1(i32 %x, i64 %y) { define i64 @sel_false_val_is_a_masked_ashr_of_true_val2(i32 %x, i64 %y) { ; CHECK-LABEL: @sel_false_val_is_a_masked_ashr_of_true_val2( -; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 %x, 2 +; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[X:%.*]], 2 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], -536870897 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 -; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 %y, [[TMP3]] +; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[Y:%.*]], [[TMP3]] ; CHECK-NEXT: ret i64 [[TMP4]] ; %1 = and i32 %x, -2147483588 |
