summaryrefslogtreecommitdiffstats
path: root/llvm/test/Transforms/InstCombine/or.ll
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/Transforms/InstCombine/or.ll')
-rw-r--r--llvm/test/Transforms/InstCombine/or.ll48
1 files changed, 16 insertions, 32 deletions
diff --git a/llvm/test/Transforms/InstCombine/or.ll b/llvm/test/Transforms/InstCombine/or.ll
index 19aa6bad51e..fb56449ba4d 100644
--- a/llvm/test/Transforms/InstCombine/or.ll
+++ b/llvm/test/Transforms/InstCombine/or.ll
@@ -660,10 +660,8 @@ final:
define i1 @or_andn_cmp_1(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @or_andn_cmp_1(
; CHECK-NEXT: [[X:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i32 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[AND]]
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[Y]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp sgt i32 %a, %b
@@ -680,10 +678,8 @@ define i1 @or_andn_cmp_1(i32 %a, i32 %b, i32 %c) {
define <2 x i1> @or_andn_cmp_2(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
; CHECK-LABEL: @or_andn_cmp_2(
; CHECK-NEXT: [[X:%.*]] = icmp sge <2 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[X_INV:%.*]] = icmp slt <2 x i32> [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt <2 x i32> [[C:%.*]], <i32 42, i32 47>
-; CHECK-NEXT: [[AND:%.*]] = and <2 x i1> [[Y]], [[X_INV]]
-; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[AND]], [[X]]
+; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[Y]], [[X]]
; CHECK-NEXT: ret <2 x i1> [[OR]]
;
%x = icmp sge <2 x i32> %a, %b
@@ -700,10 +696,8 @@ define <2 x i1> @or_andn_cmp_2(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
define i1 @or_andn_cmp_3(i72 %a, i72 %b, i72 %c) {
; CHECK-LABEL: @or_andn_cmp_3(
; CHECK-NEXT: [[X:%.*]] = icmp ugt i72 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[X_INV:%.*]] = icmp ule i72 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i72 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[X_INV]], [[Y]]
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[AND]]
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[Y]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp ugt i72 %a, %b
@@ -720,10 +714,8 @@ define i1 @or_andn_cmp_3(i72 %a, i72 %b, i72 %c) {
define <3 x i1> @or_andn_cmp_4(<3 x i32> %a, <3 x i32> %b, <3 x i32> %c) {
; CHECK-LABEL: @or_andn_cmp_4(
; CHECK-NEXT: [[X:%.*]] = icmp eq <3 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[X_INV:%.*]] = icmp ne <3 x i32> [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt <3 x i32> [[C:%.*]], <i32 42, i32 43, i32 -1>
-; CHECK-NEXT: [[AND:%.*]] = and <3 x i1> [[X_INV]], [[Y]]
-; CHECK-NEXT: [[OR:%.*]] = or <3 x i1> [[AND]], [[X]]
+; CHECK-NEXT: [[OR:%.*]] = or <3 x i1> [[Y]], [[X]]
; CHECK-NEXT: ret <3 x i1> [[OR]]
;
%x = icmp eq <3 x i32> %a, %b
@@ -735,15 +727,13 @@ define <3 x i1> @or_andn_cmp_4(<3 x i32> %a, <3 x i32> %b, <3 x i32> %c) {
}
; In the next 4 tests, vary the types and predicates for extra coverage.
-; (~X | (Y & X)) -> (X | Y), where 'not' is an inverted cmp
+; (~X | (Y & X)) -> (~X | Y), where 'not' is an inverted cmp
define i1 @orn_and_cmp_1(i37 %a, i37 %b, i37 %c) {
; CHECK-LABEL: @orn_and_cmp_1(
-; CHECK-NEXT: [[X:%.*]] = icmp sgt i37 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A]], [[B]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i37 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X]]
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[X_INV]], [[AND]]
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[X_INV]], [[Y]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp sgt i37 %a, %b
@@ -755,15 +745,13 @@ define i1 @orn_and_cmp_1(i37 %a, i37 %b, i37 %c) {
}
; Commute the 'or':
-; ((Y & X) | ~X) -> (X | Y), where 'not' is an inverted cmp
+; ((Y & X) | ~X) -> (~X | Y), where 'not' is an inverted cmp
define i1 @orn_and_cmp_2(i16 %a, i16 %b, i16 %c) {
; CHECK-LABEL: @orn_and_cmp_2(
-; CHECK-NEXT: [[X:%.*]] = icmp sge i16 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A]], [[B]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i16 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X]]
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[AND]], [[X_INV]]
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X_INV]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp sge i16 %a, %b
@@ -775,15 +763,13 @@ define i1 @orn_and_cmp_2(i16 %a, i16 %b, i16 %c) {
}
; Commute the 'and':
-; (~X | (X & Y)) -> (X | Y), where 'not' is an inverted cmp
+; (~X | (X & Y)) -> (~X | Y), where 'not' is an inverted cmp
define <4 x i1> @orn_and_cmp_3(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
; CHECK-LABEL: @orn_and_cmp_3(
-; CHECK-NEXT: [[X:%.*]] = icmp ugt <4 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[X_INV:%.*]] = icmp ule <4 x i32> [[A]], [[B]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp ule <4 x i32> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt <4 x i32> [[C:%.*]], <i32 42, i32 0, i32 1, i32 -1>
-; CHECK-NEXT: [[AND:%.*]] = and <4 x i1> [[X]], [[Y]]
-; CHECK-NEXT: [[OR:%.*]] = or <4 x i1> [[X_INV]], [[AND]]
+; CHECK-NEXT: [[OR:%.*]] = or <4 x i1> [[X_INV]], [[Y]]
; CHECK-NEXT: ret <4 x i1> [[OR]]
;
%x = icmp ugt <4 x i32> %a, %b
@@ -795,15 +781,13 @@ define <4 x i1> @orn_and_cmp_3(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
}
; Commute the 'or':
-; ((X & Y) | ~X) -> (X | Y), where 'not' is an inverted cmp
+; ((X & Y) | ~X) -> (~X | Y), where 'not' is an inverted cmp
define i1 @orn_and_cmp_4(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @orn_and_cmp_4(
-; CHECK-NEXT: [[X:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A]], [[B]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[AND]], [[X_INV]]
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X_INV]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp eq i32 %a, %b
OpenPOWER on IntegriCloud