diff options
Diffstat (limited to 'llvm/test/Transforms/ExpandMemCmp')
| -rw-r--r-- | llvm/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll | 124 | ||||
| -rw-r--r-- | llvm/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg | 3 | ||||
| -rw-r--r-- | llvm/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll | 294 | ||||
| -rw-r--r-- | llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll | 89 | ||||
| -rw-r--r-- | llvm/test/Transforms/ExpandMemCmp/X86/pr36421.ll | 79 |
5 files changed, 586 insertions, 3 deletions
diff --git a/llvm/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll b/llvm/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll new file mode 100644 index 00000000000..b6762863ad3 --- /dev/null +++ b/llvm/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll @@ -0,0 +1,124 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=aarch64-linux-gnu -data-layout="e-m:e-i64:64-n32:64" | FileCheck %s +; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=aarch64-linux-gnu -mattr=strict-align -data-layout="E-m:e-i64:64-n32:64" | FileCheck %s --check-prefix=CHECK-STRICTALIGN + +declare i32 @bcmp(i8*, i8*, i64) nounwind readonly +declare i32 @memcmp(i8*, i8*, i64) nounwind readonly + +define i1 @bcmp_b2(i8* %s1, i8* %s2) { +; CHECK-LABEL: @bcmp_b2( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[S1:%.*]] to i64* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[S2:%.*]] to i64* +; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]] +; CHECK-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] +; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]] +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[S1]], i8 7 +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64* +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[S2]], i8 7 +; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64* +; CHECK-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]] +; CHECK-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] +; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP9]], [[TMP10]] +; CHECK-NEXT: [[TMP12:%.*]] = or i64 [[TMP4]], [[TMP11]] +; CHECK-NEXT: [[TMP13:%.*]] = icmp ne i64 [[TMP12]], 0 +; CHECK-NEXT: [[TMP14:%.*]] = zext i1 [[TMP13]] to i32 +; CHECK-NEXT: [[RET:%.*]] = icmp eq i32 [[TMP14]], 0 +; CHECK-NEXT: ret i1 [[RET]] +; +; CHECK-STRICTALIGN-LABEL: @bcmp_b2( +; CHECK-STRICTALIGN-NEXT: entry: +; CHECK-STRICTALIGN-NEXT: [[TMP0:%.*]] = bitcast i8* [[S1:%.*]] to i64* +; CHECK-STRICTALIGN-NEXT: [[TMP1:%.*]] = bitcast i8* [[S2:%.*]] to i64* +; CHECK-STRICTALIGN-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]] +; CHECK-STRICTALIGN-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] +; CHECK-STRICTALIGN-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]] +; CHECK-STRICTALIGN-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[S1]], i8 8 +; CHECK-STRICTALIGN-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i32* +; CHECK-STRICTALIGN-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[S2]], i8 8 +; CHECK-STRICTALIGN-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* +; CHECK-STRICTALIGN-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP6]] +; CHECK-STRICTALIGN-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]] +; CHECK-STRICTALIGN-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64 +; CHECK-STRICTALIGN-NEXT: [[TMP12:%.*]] = zext i32 [[TMP10]] to i64 +; CHECK-STRICTALIGN-NEXT: [[TMP13:%.*]] = xor i64 [[TMP11]], [[TMP12]] +; CHECK-STRICTALIGN-NEXT: [[TMP14:%.*]] = getelementptr i8, i8* [[S1]], i8 12 +; CHECK-STRICTALIGN-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to i16* +; CHECK-STRICTALIGN-NEXT: [[TMP16:%.*]] = getelementptr i8, i8* [[S2]], i8 12 +; CHECK-STRICTALIGN-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i16* +; CHECK-STRICTALIGN-NEXT: [[TMP18:%.*]] = load i16, i16* [[TMP15]] +; CHECK-STRICTALIGN-NEXT: [[TMP19:%.*]] = load i16, i16* [[TMP17]] +; CHECK-STRICTALIGN-NEXT: [[TMP20:%.*]] = zext i16 [[TMP18]] to i64 +; CHECK-STRICTALIGN-NEXT: [[TMP21:%.*]] = zext i16 [[TMP19]] to i64 +; CHECK-STRICTALIGN-NEXT: [[TMP22:%.*]] = xor i64 [[TMP20]], [[TMP21]] +; CHECK-STRICTALIGN-NEXT: [[TMP23:%.*]] = getelementptr i8, i8* [[S1]], i8 14 +; CHECK-STRICTALIGN-NEXT: [[TMP24:%.*]] = getelementptr i8, i8* [[S2]], i8 14 +; CHECK-STRICTALIGN-NEXT: [[TMP25:%.*]] = load i8, i8* [[TMP23]] +; CHECK-STRICTALIGN-NEXT: [[TMP26:%.*]] = load i8, i8* [[TMP24]] +; CHECK-STRICTALIGN-NEXT: [[TMP27:%.*]] = zext i8 [[TMP25]] to i64 +; CHECK-STRICTALIGN-NEXT: [[TMP28:%.*]] = zext i8 [[TMP26]] to i64 +; CHECK-STRICTALIGN-NEXT: [[TMP29:%.*]] = xor i64 [[TMP27]], [[TMP28]] +; CHECK-STRICTALIGN-NEXT: [[TMP30:%.*]] = or i64 [[TMP4]], [[TMP13]] +; CHECK-STRICTALIGN-NEXT: [[TMP31:%.*]] = or i64 [[TMP22]], [[TMP29]] +; CHECK-STRICTALIGN-NEXT: [[TMP32:%.*]] = or i64 [[TMP30]], [[TMP31]] +; CHECK-STRICTALIGN-NEXT: [[TMP33:%.*]] = icmp ne i64 [[TMP32]], 0 +; CHECK-STRICTALIGN-NEXT: [[TMP34:%.*]] = zext i1 [[TMP33]] to i32 +; CHECK-STRICTALIGN-NEXT: [[RET:%.*]] = icmp eq i32 [[TMP34]], 0 +; CHECK-STRICTALIGN-NEXT: ret i1 [[RET]] +; +entry: + %bcmp = call i32 @bcmp(i8* %s1, i8* %s2, i64 15) + %ret = icmp eq i32 %bcmp, 0 + ret i1 %ret +} + +define i1 @bcmp_bs(i8* %s1, i8* %s2) optsize { +; CHECK-LABEL: @bcmp_bs( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[S1:%.*]] to i64* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[S2:%.*]] to i64* +; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]] +; CHECK-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] +; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]] +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[S1]], i8 8 +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64* +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[S2]], i8 8 +; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64* +; CHECK-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]] +; CHECK-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]] +; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP9]], [[TMP10]] +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[S1]], i8 16 +; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP12]] to i64* +; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, i8* [[S2]], i8 16 +; CHECK-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to i64* +; CHECK-NEXT: [[TMP16:%.*]] = load i64, i64* [[TMP13]] +; CHECK-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]] +; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP16]], [[TMP17]] +; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[S1]], i8 23 +; CHECK-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i64* +; CHECK-NEXT: [[TMP21:%.*]] = getelementptr i8, i8* [[S2]], i8 23 +; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to i64* +; CHECK-NEXT: [[TMP23:%.*]] = load i64, i64* [[TMP20]] +; CHECK-NEXT: [[TMP24:%.*]] = load i64, i64* [[TMP22]] +; CHECK-NEXT: [[TMP25:%.*]] = xor i64 [[TMP23]], [[TMP24]] +; CHECK-NEXT: [[TMP26:%.*]] = or i64 [[TMP4]], [[TMP11]] +; CHECK-NEXT: [[TMP27:%.*]] = or i64 [[TMP18]], [[TMP25]] +; CHECK-NEXT: [[TMP28:%.*]] = or i64 [[TMP26]], [[TMP27]] +; CHECK-NEXT: [[TMP29:%.*]] = icmp ne i64 [[TMP28]], 0 +; CHECK-NEXT: [[TMP30:%.*]] = zext i1 [[TMP29]] to i32 +; CHECK-NEXT: [[RET:%.*]] = icmp eq i32 [[TMP30]], 0 +; CHECK-NEXT: ret i1 [[RET]] +; +; CHECK-STRICTALIGN-LABEL: @bcmp_bs( +; CHECK-STRICTALIGN-NEXT: entry: +; CHECK-STRICTALIGN-NEXT: [[MEMCMP:%.*]] = call i32 @memcmp(i8* [[S1:%.*]], i8* [[S2:%.*]], i64 31) +; CHECK-STRICTALIGN-NEXT: [[RET:%.*]] = icmp eq i32 [[MEMCMP]], 0 +; CHECK-STRICTALIGN-NEXT: ret i1 [[RET]] +; +entry: + %memcmp = call i32 @memcmp(i8* %s1, i8* %s2, i64 31) + %ret = icmp eq i32 %memcmp, 0 + ret i1 %ret +} + + diff --git a/llvm/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg b/llvm/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg new file mode 100644 index 00000000000..5d33887ff0a --- /dev/null +++ b/llvm/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg @@ -0,0 +1,3 @@ +if not 'PowerPC' in config.root.targets: + config.unsupported = True + diff --git a/llvm/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll b/llvm/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll new file mode 100644 index 00000000000..c09601f969b --- /dev/null +++ b/llvm/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll @@ -0,0 +1,294 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=powerpc64le-unknown-gnu-linux -data-layout="e-m:e-i64:64-n32:64" | FileCheck %s +; RUN: opt < %s -S -expandmemcmp -verify-dom-info -mtriple=powerpc64-unknown-gnu-linux -data-layout="E-m:e-i64:64-n32:64" | FileCheck %s --check-prefix=CHECK-BE + +define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @test1( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: br label [[LOADBB:%.*]] +; CHECK: res_block: +; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1:%.*]] ] +; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP9:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1]] ] +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1 +; CHECK-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK: loadbb: +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* +; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64* +; CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]] +; CHECK-NEXT: [[TMP7:%.*]] = load i64, i64* [[TMP5]] +; CHECK-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]]) +; CHECK-NEXT: [[TMP9]] = call i64 @llvm.bswap.i64(i64 [[TMP7]]) +; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP8]], [[TMP9]] +; CHECK-NEXT: br i1 [[TMP10]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] +; CHECK: loadbb1: +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8 +; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64* +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8 +; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i64* +; CHECK-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP12]] +; CHECK-NEXT: [[TMP16:%.*]] = load i64, i64* [[TMP14]] +; CHECK-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]]) +; CHECK-NEXT: [[TMP18]] = call i64 @llvm.bswap.i64(i64 [[TMP16]]) +; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i64 [[TMP17]], [[TMP18]] +; CHECK-NEXT: br i1 [[TMP19]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; CHECK: endblock: +; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP3]], [[RES_BLOCK]] ] +; CHECK-NEXT: ret i32 [[PHI_RES]] +; +; CHECK-BE-LABEL: @test1( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: br label [[LOADBB:%.*]] +; CHECK-BE: res_block: +; CHECK-BE-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1:%.*]] ] +; CHECK-BE-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP14:%.*]], [[LOADBB1]] ] +; CHECK-BE-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; CHECK-BE-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1 +; CHECK-BE-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK-BE: loadbb: +; CHECK-BE-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* +; CHECK-BE-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64* +; CHECK-BE-NEXT: [[TMP6]] = load i64, i64* [[TMP4]] +; CHECK-BE-NEXT: [[TMP7]] = load i64, i64* [[TMP5]] +; CHECK-BE-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]] +; CHECK-BE-NEXT: br i1 [[TMP8]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] +; CHECK-BE: loadbb1: +; CHECK-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8 +; CHECK-BE-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i64* +; CHECK-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8 +; CHECK-BE-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64* +; CHECK-BE-NEXT: [[TMP13]] = load i64, i64* [[TMP10]] +; CHECK-BE-NEXT: [[TMP14]] = load i64, i64* [[TMP12]] +; CHECK-BE-NEXT: [[TMP15:%.*]] = icmp eq i64 [[TMP13]], [[TMP14]] +; CHECK-BE-NEXT: br i1 [[TMP15]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; CHECK-BE: endblock: +; CHECK-BE-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP3]], [[RES_BLOCK]] ] +; CHECK-BE-NEXT: ret i32 [[PHI_RES]] +; +entry: + + + + + + + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16) + ret i32 %call +} + +declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 + +define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @test2( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to i32* +; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i32* +; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]] +; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]]) +; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP5]]) +; CHECK-NEXT: [[TMP8:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +; CHECK-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP6]], [[TMP7]] +; CHECK-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32 +; CHECK-NEXT: [[TMP11:%.*]] = zext i1 [[TMP9]] to i32 +; CHECK-NEXT: [[TMP12:%.*]] = sub i32 [[TMP10]], [[TMP11]] +; CHECK-NEXT: ret i32 [[TMP12]] +; +; CHECK-BE-LABEL: @test2( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to i32* +; CHECK-BE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i32* +; CHECK-BE-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] +; CHECK-BE-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]] +; CHECK-BE-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[TMP4]], [[TMP5]] +; CHECK-BE-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP4]], [[TMP5]] +; CHECK-BE-NEXT: [[TMP8:%.*]] = zext i1 [[TMP6]] to i32 +; CHECK-BE-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32 +; CHECK-BE-NEXT: [[TMP10:%.*]] = sub i32 [[TMP8]], [[TMP9]] +; CHECK-BE-NEXT: ret i32 [[TMP10]] +; + + +entry: + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4) + ret i32 %call +} + +define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @test3( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: br label [[LOADBB:%.*]] +; CHECK: res_block: +; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1:%.*]] ], [ [[TMP30:%.*]], [[LOADBB2:%.*]] ] +; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP9:%.*]], [[LOADBB]] ], [ [[TMP20:%.*]], [[LOADBB1]] ], [ [[TMP31:%.*]], [[LOADBB2]] ] +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1 +; CHECK-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK: loadbb: +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* +; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64* +; CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]] +; CHECK-NEXT: [[TMP7:%.*]] = load i64, i64* [[TMP5]] +; CHECK-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]]) +; CHECK-NEXT: [[TMP9]] = call i64 @llvm.bswap.i64(i64 [[TMP7]]) +; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP8]], [[TMP9]] +; CHECK-NEXT: br i1 [[TMP10]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] +; CHECK: loadbb1: +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8 +; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32* +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8 +; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* +; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]] +; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP14]] +; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP15]]) +; CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP16]]) +; CHECK-NEXT: [[TMP19]] = zext i32 [[TMP17]] to i64 +; CHECK-NEXT: [[TMP20]] = zext i32 [[TMP18]] to i64 +; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i64 [[TMP19]], [[TMP20]] +; CHECK-NEXT: br i1 [[TMP21]], label [[LOADBB2]], label [[RES_BLOCK]] +; CHECK: loadbb2: +; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, i8* [[TMP0]], i8 12 +; CHECK-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i16* +; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, i8* [[TMP1]], i8 12 +; CHECK-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to i16* +; CHECK-NEXT: [[TMP26:%.*]] = load i16, i16* [[TMP23]] +; CHECK-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP25]] +; CHECK-NEXT: [[TMP28:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP26]]) +; CHECK-NEXT: [[TMP29:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP27]]) +; CHECK-NEXT: [[TMP30]] = zext i16 [[TMP28]] to i64 +; CHECK-NEXT: [[TMP31]] = zext i16 [[TMP29]] to i64 +; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i64 [[TMP30]], [[TMP31]] +; CHECK-NEXT: br i1 [[TMP32]], label [[LOADBB3:%.*]], label [[RES_BLOCK]] +; CHECK: loadbb3: +; CHECK-NEXT: [[TMP33:%.*]] = getelementptr i8, i8* [[TMP0]], i8 14 +; CHECK-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP1]], i8 14 +; CHECK-NEXT: [[TMP35:%.*]] = load i8, i8* [[TMP33]] +; CHECK-NEXT: [[TMP36:%.*]] = load i8, i8* [[TMP34]] +; CHECK-NEXT: [[TMP37:%.*]] = zext i8 [[TMP35]] to i32 +; CHECK-NEXT: [[TMP38:%.*]] = zext i8 [[TMP36]] to i32 +; CHECK-NEXT: [[TMP39:%.*]] = sub i32 [[TMP37]], [[TMP38]] +; CHECK-NEXT: br label [[ENDBLOCK]] +; CHECK: endblock: +; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP39]], [[LOADBB3]] ], [ [[TMP3]], [[RES_BLOCK]] ] +; CHECK-NEXT: ret i32 [[PHI_RES]] +; +; CHECK-BE-LABEL: @test3( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: br label [[LOADBB:%.*]] +; CHECK-BE: res_block: +; CHECK-BE-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP15:%.*]], [[LOADBB1:%.*]] ], [ [[TMP24:%.*]], [[LOADBB2:%.*]] ] +; CHECK-BE-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ], [ [[TMP25:%.*]], [[LOADBB2]] ] +; CHECK-BE-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; CHECK-BE-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1 +; CHECK-BE-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK-BE: loadbb: +; CHECK-BE-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* +; CHECK-BE-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64* +; CHECK-BE-NEXT: [[TMP6]] = load i64, i64* [[TMP4]] +; CHECK-BE-NEXT: [[TMP7]] = load i64, i64* [[TMP5]] +; CHECK-BE-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]] +; CHECK-BE-NEXT: br i1 [[TMP8]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] +; CHECK-BE: loadbb1: +; CHECK-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8 +; CHECK-BE-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* +; CHECK-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8 +; CHECK-BE-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32* +; CHECK-BE-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP10]] +; CHECK-BE-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]] +; CHECK-BE-NEXT: [[TMP15]] = zext i32 [[TMP13]] to i64 +; CHECK-BE-NEXT: [[TMP16]] = zext i32 [[TMP14]] to i64 +; CHECK-BE-NEXT: [[TMP17:%.*]] = icmp eq i64 [[TMP15]], [[TMP16]] +; CHECK-BE-NEXT: br i1 [[TMP17]], label [[LOADBB2]], label [[RES_BLOCK]] +; CHECK-BE: loadbb2: +; CHECK-BE-NEXT: [[TMP18:%.*]] = getelementptr i8, i8* [[TMP0]], i8 12 +; CHECK-BE-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to i16* +; CHECK-BE-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[TMP1]], i8 12 +; CHECK-BE-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16* +; CHECK-BE-NEXT: [[TMP22:%.*]] = load i16, i16* [[TMP19]] +; CHECK-BE-NEXT: [[TMP23:%.*]] = load i16, i16* [[TMP21]] +; CHECK-BE-NEXT: [[TMP24]] = zext i16 [[TMP22]] to i64 +; CHECK-BE-NEXT: [[TMP25]] = zext i16 [[TMP23]] to i64 +; CHECK-BE-NEXT: [[TMP26:%.*]] = icmp eq i64 [[TMP24]], [[TMP25]] +; CHECK-BE-NEXT: br i1 [[TMP26]], label [[LOADBB3:%.*]], label [[RES_BLOCK]] +; CHECK-BE: loadbb3: +; CHECK-BE-NEXT: [[TMP27:%.*]] = getelementptr i8, i8* [[TMP0]], i8 14 +; CHECK-BE-NEXT: [[TMP28:%.*]] = getelementptr i8, i8* [[TMP1]], i8 14 +; CHECK-BE-NEXT: [[TMP29:%.*]] = load i8, i8* [[TMP27]] +; CHECK-BE-NEXT: [[TMP30:%.*]] = load i8, i8* [[TMP28]] +; CHECK-BE-NEXT: [[TMP31:%.*]] = zext i8 [[TMP29]] to i32 +; CHECK-BE-NEXT: [[TMP32:%.*]] = zext i8 [[TMP30]] to i32 +; CHECK-BE-NEXT: [[TMP33:%.*]] = sub i32 [[TMP31]], [[TMP32]] +; CHECK-BE-NEXT: br label [[ENDBLOCK]] +; CHECK-BE: endblock: +; CHECK-BE-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP33]], [[LOADBB3]] ], [ [[TMP3]], [[RES_BLOCK]] ] +; CHECK-BE-NEXT: ret i32 [[PHI_RES]] +; +entry: + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15) + ret i32 %call +} + +define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @test4( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 65) +; CHECK-NEXT: ret i32 [[CALL]] +; +; CHECK-BE-LABEL: @test4( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 65) +; CHECK-BE-NEXT: ret i32 [[CALL]] +; +entry: + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65) + ret i32 %call +} + +define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE) { +; CHECK-LABEL: @test5( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[SIZE:%.*]] to i64 +; CHECK-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 [[CONV]]) +; CHECK-NEXT: ret i32 [[CALL]] +; +; CHECK-BE-LABEL: @test5( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: [[CONV:%.*]] = sext i32 [[SIZE:%.*]] to i64 +; CHECK-BE-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 [[CONV]]) +; CHECK-BE-NEXT: ret i32 [[CALL]] +; +entry: + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %conv = sext i32 %SIZE to i64 + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv) + ret i32 %call +} diff --git a/llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll b/llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll index c1cbcc3272c..3c050223b53 100644 --- a/llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll +++ b/llvm/test/Transforms/ExpandMemCmp/X86/memcmp.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -expandmemcmp -mtriple=i686-unknown-unknown -data-layout=e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X32 -; RUN: opt -S -expandmemcmp -memcmp-num-loads-per-block=1 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_1LD -; RUN: opt -S -expandmemcmp -memcmp-num-loads-per-block=2 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_2LD +; RUN: opt -S -domtree -expandmemcmp -verify-dom-info -mtriple=i686-unknown-unknown -data-layout=e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X32 +; RUN: opt -S -domtree -expandmemcmp -verify-dom-info -memcmp-num-loads-per-block=1 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 -mattr=+avx2 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_1LD +; RUN: opt -S -domtree -expandmemcmp -verify-dom-info -memcmp-num-loads-per-block=2 -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128 -mattr=+avx2 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64 --check-prefix=X64_2LD declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) @@ -1217,3 +1217,86 @@ define i32 @cmp_eq16(i8* nocapture readonly %x, i8* nocapture readonly %y) { ret i32 %conv } +define i32 @cmp_eq32(i8* nocapture readonly %x, i8* nocapture readonly %y) { +; X32-LABEL: @cmp_eq32( +; X32-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 32) +; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0 +; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 +; X32-NEXT: ret i32 [[CONV]] +; +; X64-LABEL: @cmp_eq32( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i256* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i256* +; X64-NEXT: [[TMP3:%.*]] = load i256, i256* [[TMP1]] +; X64-NEXT: [[TMP4:%.*]] = load i256, i256* [[TMP2]] +; X64-NEXT: [[TMP5:%.*]] = icmp ne i256 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32 +; X64-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0 +; X64-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 +; X64-NEXT: ret i32 [[CONV]] +; + %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32) + %cmp = icmp eq i32 %call, 0 + %conv = zext i1 %cmp to i32 + ret i32 %conv +} + +define i32 @cmp_eq32_prefer128(i8* nocapture readonly %x, i8* nocapture readonly %y) "prefer-vector-width"="128" { +; X32-LABEL: @cmp_eq32_prefer128( +; X32-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 32) +; X32-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0 +; X32-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 +; X32-NEXT: ret i32 [[CONV]] +; +; X64_1LD-LABEL: @cmp_eq32_prefer128( +; X64_1LD-NEXT: br label [[LOADBB:%.*]] +; X64_1LD: res_block: +; X64_1LD-NEXT: br label [[ENDBLOCK:%.*]] +; X64_1LD: loadbb: +; X64_1LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128* +; X64_1LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128* +; X64_1LD-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]] +; X64_1LD-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]] +; X64_1LD-NEXT: [[TMP5:%.*]] = icmp ne i128 [[TMP3]], [[TMP4]] +; X64_1LD-NEXT: br i1 [[TMP5]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]] +; X64_1LD: loadbb1: +; X64_1LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i8 16 +; X64_1LD-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i128* +; X64_1LD-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i8 16 +; X64_1LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i128* +; X64_1LD-NEXT: [[TMP10:%.*]] = load i128, i128* [[TMP7]] +; X64_1LD-NEXT: [[TMP11:%.*]] = load i128, i128* [[TMP9]] +; X64_1LD-NEXT: [[TMP12:%.*]] = icmp ne i128 [[TMP10]], [[TMP11]] +; X64_1LD-NEXT: br i1 [[TMP12]], label [[RES_BLOCK]], label [[ENDBLOCK]] +; X64_1LD: endblock: +; X64_1LD-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] +; X64_1LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0 +; X64_1LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 +; X64_1LD-NEXT: ret i32 [[CONV]] +; +; X64_2LD-LABEL: @cmp_eq32_prefer128( +; X64_2LD-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128* +; X64_2LD-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128* +; X64_2LD-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]] +; X64_2LD-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]] +; X64_2LD-NEXT: [[TMP5:%.*]] = xor i128 [[TMP3]], [[TMP4]] +; X64_2LD-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i8 16 +; X64_2LD-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i128* +; X64_2LD-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i8 16 +; X64_2LD-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i128* +; X64_2LD-NEXT: [[TMP10:%.*]] = load i128, i128* [[TMP7]] +; X64_2LD-NEXT: [[TMP11:%.*]] = load i128, i128* [[TMP9]] +; X64_2LD-NEXT: [[TMP12:%.*]] = xor i128 [[TMP10]], [[TMP11]] +; X64_2LD-NEXT: [[TMP13:%.*]] = or i128 [[TMP5]], [[TMP12]] +; X64_2LD-NEXT: [[TMP14:%.*]] = icmp ne i128 [[TMP13]], 0 +; X64_2LD-NEXT: [[TMP15:%.*]] = zext i1 [[TMP14]] to i32 +; X64_2LD-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP15]], 0 +; X64_2LD-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 +; X64_2LD-NEXT: ret i32 [[CONV]] +; + %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32) + %cmp = icmp eq i32 %call, 0 + %conv = zext i1 %cmp to i32 + ret i32 %conv +} + diff --git a/llvm/test/Transforms/ExpandMemCmp/X86/pr36421.ll b/llvm/test/Transforms/ExpandMemCmp/X86/pr36421.ll new file mode 100644 index 00000000000..c64d37a3757 --- /dev/null +++ b/llvm/test/Transforms/ExpandMemCmp/X86/pr36421.ll @@ -0,0 +1,79 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -domtree -expandmemcmp -verify-dom-info -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-unknown" + +@.str = private unnamed_addr constant [7 x i8] c"abcdef\00", align 1 +@.str.1 = private unnamed_addr constant [7 x i8] c"ABCDEF\00", align 1 + +define i32 @test(i8* nocapture readonly %string, i32 %len) local_unnamed_addr #0 { +; CHECK-LABEL: @test( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[LEN:%.*]], 6 +; CHECK-NEXT: br i1 [[COND]], label [[SW_BB:%.*]], label [[RETURN:%.*]] +; CHECK: sw.bb: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[STRING:%.*]] to i32* +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]] +; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 1684234849 +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, i8* [[STRING]], i8 4 +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to i16* +; CHECK-NEXT: [[TMP5:%.*]] = load i16, i16* [[TMP4]] +; CHECK-NEXT: [[TMP6:%.*]] = zext i16 [[TMP5]] to i32 +; CHECK-NEXT: [[TMP7:%.*]] = xor i32 [[TMP6]], 26213 +; CHECK-NEXT: [[TMP8:%.*]] = or i32 [[TMP2]], [[TMP7]] +; CHECK-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 +; CHECK-NEXT: [[TMP10:%.*]] = zext i1 [[TMP9]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP10]], 0 +; CHECK-NEXT: br i1 [[CMP]], label [[RETURN]], label [[IF_END:%.*]] +; CHECK: if.end: +; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8* [[STRING]] to i32* +; CHECK-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]] +; CHECK-NEXT: [[TMP13:%.*]] = xor i32 [[TMP12]], 1145258561 +; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, i8* [[STRING]], i8 4 +; CHECK-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to i16* +; CHECK-NEXT: [[TMP16:%.*]] = load i16, i16* [[TMP15]] +; CHECK-NEXT: [[TMP17:%.*]] = zext i16 [[TMP16]] to i32 +; CHECK-NEXT: [[TMP18:%.*]] = xor i32 [[TMP17]], 17989 +; CHECK-NEXT: [[TMP19:%.*]] = or i32 [[TMP13]], [[TMP18]] +; CHECK-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 +; CHECK-NEXT: [[TMP21:%.*]] = zext i1 [[TMP20]] to i32 +; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[TMP21]], 0 +; CHECK-NEXT: [[DOT:%.*]] = select i1 [[CMP2]], i32 64, i32 0 +; CHECK-NEXT: br label [[RETURN]] +; CHECK: return: +; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 61, [[SW_BB]] ], [ [[DOT]], [[IF_END]] ], [ 0, [[ENTRY:%.*]] ] +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; +entry: + %cond = icmp eq i32 %len, 6 + br i1 %cond, label %sw.bb, label %return + +sw.bb: ; preds = %entry + %call = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 6) + %cmp = icmp eq i32 %call, 0 + br i1 %cmp, label %return, label %if.end + +if.end: ; preds = %sw.bb + %call1 = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i64 6) + %cmp2 = icmp eq i32 %call1, 0 + %. = select i1 %cmp2, i32 64, i32 0 + br label %return + +return: ; preds = %entry, %if.end8, %if.end4, %if.end, %sw.bb + %retval.0 = phi i32 [ 61, %sw.bb ], [ %., %if.end ], [ 0, %entry ] + ret i32 %retval.0 +} + +; Function Attrs: nounwind readonly +declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 + +attributes #0 = { nounwind readonly ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } + +!llvm.module.flags = !{!0, !1} +!llvm.ident = !{!2} + +!0 = !{i32 1, !"wchar_size", i32 4} +!1 = !{i32 7, !"PIC Level", i32 2} +!2 = !{!"clang version 7.0.0 (trunk 325350)"} |
