diff options
Diffstat (limited to 'llvm/test/MC')
| -rw-r--r-- | llvm/test/MC/ARM/diagnostics.s | 7 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/thumb-diagnostics.s | 16 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt | 16 |
3 files changed, 39 insertions, 0 deletions
diff --git a/llvm/test/MC/ARM/diagnostics.s b/llvm/test/MC/ARM/diagnostics.s index 55bb1dd37ca..5eae4d216e4 100644 --- a/llvm/test/MC/ARM/diagnostics.s +++ b/llvm/test/MC/ARM/diagnostics.s @@ -429,3 +429,10 @@ bkpteq #7 @ CHECK-ERRORS: error: instruction 'bkpt' is not predicable, but condition code specified + + ldm r2!, {r2, r3} + ldmdb r2!, {r2, r3} + ldmda r2!, {r2, r3} +@ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list +@ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list +@ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list diff --git a/llvm/test/MC/ARM/thumb-diagnostics.s b/llvm/test/MC/ARM/thumb-diagnostics.s index a82d497ceac..8b55e3740da 100644 --- a/llvm/test/MC/ARM/thumb-diagnostics.s +++ b/llvm/test/MC/ARM/thumb-diagnostics.s @@ -57,6 +57,8 @@ error: invalid operand for instruction ldm r2!, {r5, r8} ldm r2, {r5, r7} ldm r2!, {r2, r3, r4} + ldm r2!, {r2, r3, r4, r10} + ldmdb r2!, {r2, r3, r4} @ CHECK-ERRORS: error: registers must be in range r0-r7 @ CHECK-ERRORS: ldm r2!, {r5, r8} @ CHECK-ERRORS: ^ @@ -66,6 +68,12 @@ error: invalid operand for instruction @ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list @ CHECK-ERRORS: ldm r2!, {r2, r3, r4} @ CHECK-ERRORS: ^ +@ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list +@ CHECK-ERRORS-V8: ldm r2!, {r2, r3, r4, r10} +@ CHECK-ERRORS-V8: ^ +@ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list +@ CHECK-ERRORS-V8: ldmdb r2!, {r2, r3, r4} +@ CHECK-ERRORS-V8: ^ @ Invalid writeback and register lists for PUSH/POP pop {r1, r2, r10} @@ -81,12 +89,20 @@ error: invalid operand for instruction @ Invalid writeback and register lists for STM stm r1, {r2, r6} stm r1!, {r2, r9} + stm r2!, {r2, r9} + stmdb r2!, {r0, r2} @ CHECK-ERRORS: error: instruction requires: thumb2 @ CHECK-ERRORS: stm r1, {r2, r6} @ CHECK-ERRORS: ^ @ CHECK-ERRORS: error: registers must be in range r0-r7 @ CHECK-ERRORS: stm r1!, {r2, r9} @ CHECK-ERRORS: ^ +@ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list +@ CHECK-ERRORS-V8: stm r2!, {r2, r9} +@ CHECK-ERRORS-V8: ^ +@ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list +@ CHECK-ERRORS-V8: stmdb r2!, {r0, r2} +@ CHECK-ERRORS-V8: ^ @ Out of range immediates for LSL instruction. lsls r4, r5, #-1 diff --git a/llvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt b/llvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt index 16970844ae8..2c84b8a7aa5 100644 --- a/llvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt +++ b/llvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt @@ -389,3 +389,19 @@ [0x80 0xf9 0x30 0x0b] # CHECK: invalid instruction encoding # CHECK-NEXT: [0x80 0xf9 0x30 0x0b] + + +#------------------------------------------------------------------------------ +# Unpredictable STMs +#------------------------------------------------------------------------------ + +# 32-bit Thumb STM instructions cannot have a writeback register which appears +# in the list. + +[0xa1,0xe8,0x07,0x04] +# CHECK: warning: potentially undefined instruction encoding +# CHECK-NEXT: [0xa1,0xe8,0x07,0x04] + +[0x21,0xe9,0x07,0x04] +# CHECK: warning: potentially undefined instruction encoding +# CHECK-NEXT: [0x21,0xe9,0x07,0x04] |
