diff options
Diffstat (limited to 'llvm/test/MC/Mips')
| -rw-r--r-- | llvm/test/MC/Mips/micromips-invalid.s | 1 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/micromips/invalid.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/micromips32r6/invalid.s | 3 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/micromips64r6/invalid.s | 3 |
4 files changed, 6 insertions, 3 deletions
diff --git a/llvm/test/MC/Mips/micromips-invalid.s b/llvm/test/MC/Mips/micromips-invalid.s index 7d34e79cf71..1c5f0f7fca2 100644 --- a/llvm/test/MC/Mips/micromips-invalid.s +++ b/llvm/test/MC/Mips/micromips-invalid.s @@ -4,7 +4,6 @@ addiur1sp $7, 260 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range addiur1sp $7, 241 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: misaligned immediate operand value addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction - addius5 $7, 9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range addiusp 1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range addu16 $6, $14, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction subu16 $5, $16, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/llvm/test/MC/Mips/micromips/invalid.s b/llvm/test/MC/Mips/micromips/invalid.s index aae32592c6a..675a952d0db 100644 --- a/llvm/test/MC/Mips/micromips/invalid.s +++ b/llvm/test/MC/Mips/micromips/invalid.s @@ -1,6 +1,8 @@ # RUN: not llvm-mc %s -triple=mips -show-encoding -mattr=micromips 2>%t1 # RUN: FileCheck %s < %t1 + addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate + addius5 $2, 8 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate break -1 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate break 1024 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate break -1, 5 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate diff --git a/llvm/test/MC/Mips/micromips32r6/invalid.s b/llvm/test/MC/Mips/micromips32r6/invalid.s index 579620ddc0f..7338e065991 100644 --- a/llvm/test/MC/Mips/micromips32r6/invalid.s +++ b/llvm/test/MC/Mips/micromips32r6/invalid.s @@ -6,7 +6,8 @@ addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range - addius5 $7, 9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate + addius5 $2, 8 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate addiusp 1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range align $4, $2, $3, -1 # CHECK: :[[@LINE]]:21: error: expected 2-bit unsigned immediate align $4, $2, $3, 4 # CHECK: :[[@LINE]]:21: error: expected 2-bit unsigned immediate diff --git a/llvm/test/MC/Mips/micromips64r6/invalid.s b/llvm/test/MC/Mips/micromips64r6/invalid.s index c42d204741c..f509953e8b0 100644 --- a/llvm/test/MC/Mips/micromips64r6/invalid.s +++ b/llvm/test/MC/Mips/micromips64r6/invalid.s @@ -6,7 +6,8 @@ addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range - addius5 $7, 9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate + addius5 $2, 8 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate addiusp 1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range align $4, $2, $3, -1 # CHECK: :[[@LINE]]:21: error: expected 2-bit unsigned immediate align $4, $2, $3, 4 # CHECK: :[[@LINE]]:21: error: expected 2-bit unsigned immediate |
