summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/Mips/msa/invalid.s
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/MC/Mips/msa/invalid.s')
-rw-r--r--llvm/test/MC/Mips/msa/invalid.s8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/msa/invalid.s b/llvm/test/MC/Mips/msa/invalid.s
index 0875efba877..31eddd87062 100644
--- a/llvm/test/MC/Mips/msa/invalid.s
+++ b/llvm/test/MC/Mips/msa/invalid.s
@@ -11,3 +11,11 @@
insve.d $w3[0], $w18[1] # CHECK: :[[@LINE]]:26: error: expected '0'
lsa $2, $3, $4, 0 # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
lsa $2, $3, $4, 5 # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
+ sat_s.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_s.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_u.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_u.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ srari.b $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
+ srari.b $w5, $w25, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
+ srlri.b $w18, $w3, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
+ srlri.b $w18, $w3, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
OpenPOWER on IntegriCloud