diff options
Diffstat (limited to 'llvm/test/MC/ARM64')
| -rw-r--r-- | llvm/test/MC/ARM64/aliases.s | 4 | ||||
| -rw-r--r-- | llvm/test/MC/ARM64/arithmetic-encoding.s | 20 | ||||
| -rw-r--r-- | llvm/test/MC/ARM64/optional-hash.s | 2 |
3 files changed, 13 insertions, 13 deletions
diff --git a/llvm/test/MC/ARM64/aliases.s b/llvm/test/MC/ARM64/aliases.s index a1d1e8349b7..df746b3c8aa 100644 --- a/llvm/test/MC/ARM64/aliases.s +++ b/llvm/test/MC/ARM64/aliases.s @@ -67,7 +67,7 @@ foo: cmn x4, x5, uxtx #1 ; CHECK: cmn w1, #3 ; encoding: [0x3f,0x0c,0x00,0x31] -; CHECK: cmn x2, #4194304 ; encoding: [0x5f,0x00,0x50,0xb1] +; CHECK: cmn x2, #1024, lsl #12 ; encoding: [0x5f,0x00,0x50,0xb1] ; CHECK: cmn w4, w5 ; encoding: [0x9f,0x00,0x05,0x2b] ; CHECK: cmn x6, x7 ; encoding: [0xdf,0x00,0x07,0xab] ; CHECK: cmn w8, w9, asr #3 ; encoding: [0x1f,0x0d,0x89,0x2b] @@ -92,7 +92,7 @@ foo: cmp w9, w8, uxtw cmp wsp, w9, lsl #0 -; CHECK: cmp w1, #4194304 ; encoding: [0x3f,0x00,0x50,0x71] +; CHECK: cmp w1, #1024, lsl #12 ; encoding: [0x3f,0x00,0x50,0x71] ; CHECK: cmp x2, #1024 ; encoding: [0x5f,0x00,0x10,0xf1] ; CHECK: cmp w4, w5 ; encoding: [0x9f,0x00,0x05,0x6b] ; CHECK: cmp x6, x7 ; encoding: [0xdf,0x00,0x07,0xeb] diff --git a/llvm/test/MC/ARM64/arithmetic-encoding.s b/llvm/test/MC/ARM64/arithmetic-encoding.s index 2193feb3f6a..6dd8ba1521a 100644 --- a/llvm/test/MC/ARM64/arithmetic-encoding.s +++ b/llvm/test/MC/ARM64/arithmetic-encoding.s @@ -47,11 +47,11 @@ foo: add x3, x4, #0, lsl #12 add sp, sp, #32 -; CHECK: add w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x11] -; CHECK: add w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x11] +; CHECK: add w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x11] +; CHECK: add w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x11] ; CHECK: add w3, w4, #0, lsl #12 ; encoding: [0x83,0x00,0x40,0x11] -; CHECK: add x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0x91] -; CHECK: add x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0x91] +; CHECK: add x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x91] +; CHECK: add x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x91] ; CHECK: add x3, x4, #0, lsl #12 ; encoding: [0x83,0x00,0x40,0x91] ; CHECK: add sp, sp, #32 ; encoding: [0xff,0x83,0x00,0x91] @@ -64,10 +64,10 @@ foo: ; CHECK: adds w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x31] ; CHECK: adds w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x31] -; CHECK: adds w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x31] +; CHECK: adds w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x31] ; CHECK: adds x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xb1] ; CHECK: adds x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xb1] -; CHECK: adds x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0xb1] +; CHECK: adds x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0xb1] sub w3, w4, #1024 sub w3, w4, #1024, lsl #0 @@ -79,10 +79,10 @@ foo: ; CHECK: sub w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x51] ; CHECK: sub w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x51] -; CHECK: sub w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x51] +; CHECK: sub w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x51] ; CHECK: sub x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xd1] ; CHECK: sub x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xd1] -; CHECK: sub x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0xd1] +; CHECK: sub x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0xd1] ; CHECK: sub sp, sp, #32 ; encoding: [0xff,0x83,0x00,0xd1] subs w3, w4, #1024 @@ -94,10 +94,10 @@ foo: ; CHECK: subs w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x71] ; CHECK: subs w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x71] -; CHECK: subs w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x71] +; CHECK: subs w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x71] ; CHECK: subs x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xf1] ; CHECK: subs x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xf1] -; CHECK: subs x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0xf1] +; CHECK: subs x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0xf1] ;==---------------------------------------------------------------------------== ; Add/Subtract register with (optional) shift diff --git a/llvm/test/MC/ARM64/optional-hash.s b/llvm/test/MC/ARM64/optional-hash.s index c67c124c31a..f7c5e21832e 100644 --- a/llvm/test/MC/ARM64/optional-hash.s +++ b/llvm/test/MC/ARM64/optional-hash.s @@ -5,7 +5,7 @@ add sp, sp, 32 ; Optional shift -; CHECK: adds x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0xb1] +; CHECK: adds x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0xb1] adds x3, x4, 1024, lsl 12 ; Optional extend |
