diff options
Diffstat (limited to 'llvm/test/MC/AArch64/SVE/add-diagnostics.s')
| -rw-r--r-- | llvm/test/MC/AArch64/SVE/add-diagnostics.s | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/llvm/test/MC/AArch64/SVE/add-diagnostics.s b/llvm/test/MC/AArch64/SVE/add-diagnostics.s index 4cd351d1799..eea960fea9d 100644 --- a/llvm/test/MC/AArch64/SVE/add-diagnostics.s +++ b/llvm/test/MC/AArch64/SVE/add-diagnostics.s @@ -51,4 +51,27 @@ add z30.s, p8/m, z30.s, z13.s add z29.d, p8/m, z29.d, z8.d // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: add z29.d, p8/m, z29.d, z8.d -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Source and Destination Registers must match + +add z19.b, p4/m, z20.b, z13.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register +// CHECK-NEXT: add z19.b, p4/m, z20.b, z13.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +add z9.h, p3/m, z10.h, z28.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register +// CHECK-NEXT: add z9.h, p3/m, z10.h, z28.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +add z5.s, p3/m, z6.s, z18.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register +// CHECK-NEXT: add z5.s, p3/m, z6.s, z18.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +add z9.d, p4/m, z10.d, z7.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register +// CHECK-NEXT: add z9.d, p4/m, z10.d, z7.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |
