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-rw-r--r--llvm/test/DebugInfo/X86/fission-ranges.ll34
1 files changed, 17 insertions, 17 deletions
diff --git a/llvm/test/DebugInfo/X86/fission-ranges.ll b/llvm/test/DebugInfo/X86/fission-ranges.ll
index 3f9e447f630..8f72ee116f5 100644
--- a/llvm/test/DebugInfo/X86/fission-ranges.ll
+++ b/llvm/test/DebugInfo/X86/fission-ranges.ll
@@ -32,10 +32,10 @@
; CHECK: DW_TAG_formal_parameter
; CHECK-NEXT: DW_AT_const_value [DW_FORM_sdata] (1)
; CHECK-NEXT: DW_AT_name {{.*}} "p")
-; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[A:0x[0-9a-z]*]]
-; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[E:0x[0-9a-z]*]]
-; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[B:0x[0-9a-z]*]]
-; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[D:0x[0-9a-z]*]]
+; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[A:0x[0-9a-z]*]]:
+; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[E:0x[0-9a-z]*]]:
+; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[B:0x[0-9a-z]*]]:
+; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[D:0x[0-9a-z]*]]:
; CHECK: DW_AT_ranges [DW_FORM_sec_offset] (0x00000000
; CHECK-NOT: .debug_loc contents:
; CHECK-NOT: Beginning address offset
@@ -45,31 +45,31 @@
; if they've changed due to a bugfix, change in register allocation, etc.
; CHECK: [[A]]:
-; CHECK-NEXT: DW_LLE_startx_length(0x00000002, 0x0000000f)
+; CHECK-NEXT: DW_LLE_startx_length (0x00000002, 0x0000000f)
; CHECK-NEXT: => Addr idx 2 (w/ length 15): DW_OP_consts +0, DW_OP_stack_value
-; CHECK-NEXT: DW_LLE_startx_length(0x00000003, 0x0000000f)
+; CHECK-NEXT: DW_LLE_startx_length (0x00000003, 0x0000000f)
; CHECK-NEXT: => Addr idx 3 (w/ length 15): DW_OP_reg0 RAX
-; CHECK-NEXT: DW_LLE_startx_length(0x00000004, 0x00000012)
+; CHECK-NEXT: DW_LLE_startx_length (0x00000004, 0x00000012)
; CHECK-NEXT: => Addr idx 4 (w/ length 18): DW_OP_breg7 RSP-8
-; CHECK-NEXT: DW_LLE_end_of_list ()
+; CHECK-NEXT: DW_LLE_end_of_list ()
; CHECK: [[E]]:
-; CHECK-NEXT: DW_LLE_startx_length(0x00000005, 0x00000009)
+; CHECK-NEXT: DW_LLE_startx_length (0x00000005, 0x00000009)
; CHECK-NEXT: => Addr idx 5 (w/ length 9): DW_OP_reg0 RAX
-; CHECK-NEXT: DW_LLE_startx_length(0x00000006, 0x00000062)
+; CHECK-NEXT: DW_LLE_startx_length (0x00000006, 0x00000062)
; CHECK-NEXT: => Addr idx 6 (w/ length 98): DW_OP_breg7 RSP-44
-; CHECK-NEXT: DW_LLE_end_of_list ()
+; CHECK-NEXT: DW_LLE_end_of_list ()
; CHECK: [[B]]:
-; CHECK-NEXT: DW_LLE_startx_length(0x00000007, 0x0000000f)
+; CHECK-NEXT: DW_LLE_startx_length (0x00000007, 0x0000000f)
; CHECK-NEXT: => Addr idx 7 (w/ length 15): DW_OP_reg0 RAX
-; CHECK-NEXT: DW_LLE_startx_length(0x00000008, 0x00000042)
+; CHECK-NEXT: DW_LLE_startx_length (0x00000008, 0x00000042)
; CHECK-NEXT: => Addr idx 8 (w/ length 66): DW_OP_breg7 RSP-32
-; CHECK-NEXT: DW_LLE_end_of_list ()
+; CHECK-NEXT: DW_LLE_end_of_list ()
; CHECK: [[D]]:
-; CHECK-NEXT: DW_LLE_startx_length(0x00000009, 0x0000000f)
+; CHECK-NEXT: DW_LLE_startx_length (0x00000009, 0x0000000f)
; CHECK-NEXT: => Addr idx 9 (w/ length 15): DW_OP_reg0 RAX
-; CHECK-NEXT: DW_LLE_startx_length(0x0000000a, 0x0000002a)
+; CHECK-NEXT: DW_LLE_startx_length (0x0000000a, 0x0000002a)
; CHECK-NEXT: => Addr idx 10 (w/ length 42): DW_OP_breg7 RSP-20
-; CHECK-NEXT: DW_LLE_end_of_list ()
+; CHECK-NEXT: DW_LLE_end_of_list ()
; Make sure we don't produce any relocations in any .dwo section (though in particular, debug_info.dwo)
; HDR-NOT: .rela.{{.*}}.dwo
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