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-rw-r--r--llvm/test/CodeGen/X86/mmx-schedule.ll2
-rw-r--r--llvm/test/CodeGen/X86/schedule-x86-64-shld.ll8
-rw-r--r--llvm/test/CodeGen/X86/schedule-x86_32.ll18
-rw-r--r--llvm/test/CodeGen/X86/schedule-x86_64.ll42
-rw-r--r--llvm/test/CodeGen/X86/sse-schedule.ll12
-rw-r--r--llvm/test/CodeGen/X86/sse2-schedule.ll8
-rw-r--r--llvm/test/CodeGen/X86/x87-schedule.ll26
7 files changed, 58 insertions, 58 deletions
diff --git a/llvm/test/CodeGen/X86/mmx-schedule.ll b/llvm/test/CodeGen/X86/mmx-schedule.ll
index 6a8a487d7c1..51dc5e102ff 100644
--- a/llvm/test/CodeGen/X86/mmx-schedule.ll
+++ b/llvm/test/CodeGen/X86/mmx-schedule.ll
@@ -787,7 +787,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %a1, i32 *%a2) {
; BDVER2-NEXT: paddd %mm2, %mm0 # sched: [2:0.50]
; BDVER2-NEXT: movd %mm2, %ecx # sched: [10:1.00]
; BDVER2-NEXT: movd %mm0, %eax # sched: [10:1.00]
-; BDVER2-NEXT: movl %ecx, (%rsi) # sched: [1:0.50]
+; BDVER2-NEXT: movl %ecx, (%rsi) # sched: [1:1.00]
; BDVER2-NEXT: retq # sched: [5:1.00]
;
; BTVER2-LABEL: test_movd:
diff --git a/llvm/test/CodeGen/X86/schedule-x86-64-shld.ll b/llvm/test/CodeGen/X86/schedule-x86-64-shld.ll
index 0e66329f7b4..541a3fa79d9 100644
--- a/llvm/test/CodeGen/X86/schedule-x86-64-shld.ll
+++ b/llvm/test/CodeGen/X86/schedule-x86-64-shld.ll
@@ -325,7 +325,7 @@ define void @lshift_mem_cl(i64 %a, i64 %c) nounwind readnone {
; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx
; BDVER12-NEXT: shrq %cl, %rdi # sched: [1:0.50]
; BDVER12-NEXT: orq %rax, %rdi # sched: [1:0.50]
-; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:0.50]
+; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:1.00]
; BDVER12-NEXT: retq # sched: [5:1.00]
;
; BTVER2-LABEL: lshift_mem_cl:
@@ -361,7 +361,7 @@ define void @lshift_mem(i64 %a) nounwind readnone {
; BDVER12-NEXT: shrq $54, %rdi # sched: [1:0.50]
; BDVER12-NEXT: shlq $10, %rax # sched: [1:0.50]
; BDVER12-NEXT: orq %rax, %rdi # sched: [1:0.50]
-; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:0.50]
+; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:1.00]
; BDVER12-NEXT: retq # sched: [5:1.00]
;
; BTVER2-LABEL: lshift_mem:
@@ -419,7 +419,7 @@ define void @lshift_mem_b(i64 %b) nounwind readnone {
; BDVER12-NEXT: shlq $10, %rdi # sched: [1:0.50]
; BDVER12-NEXT: shrq $54, %rax # sched: [1:0.50]
; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.50]
-; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:0.50]
+; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00]
; BDVER12-NEXT: retq # sched: [5:1.00]
;
; BTVER2-LABEL: lshift_mem_b:
@@ -451,7 +451,7 @@ define void @lshift_mem_b_optsize(i64 %b) nounwind readnone optsize {
; BDVER12: # %bb.0: # %entry
; BDVER12-NEXT: movq {{.*}}(%rip), %rax # sched: [5:0.50]
; BDVER12-NEXT: shrdq $54, %rdi, %rax # sched: [4:3.00]
-; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:0.50]
+; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00]
; BDVER12-NEXT: retq # sched: [5:1.00]
;
; BTVER2-LABEL: lshift_mem_b_optsize:
diff --git a/llvm/test/CodeGen/X86/schedule-x86_32.ll b/llvm/test/CodeGen/X86/schedule-x86_32.ll
index 6b8ad906fec..917f1a7bfa3 100644
--- a/llvm/test/CodeGen/X86/schedule-x86_32.ll
+++ b/llvm/test/CodeGen/X86/schedule-x86_32.ll
@@ -644,7 +644,7 @@ define void @test_bound(i16 %a0, i16 *%a1, i32 %a2, i32 *%a3) optsize {
;
; BDVER2-LABEL: test_bound:
; BDVER2: # %bb.0:
-; BDVER2-NEXT: pushl %esi # sched: [1:0.50]
+; BDVER2-NEXT: pushl %esi # sched: [1:1.00]
; BDVER2-NEXT: .cfi_def_cfa_offset 8
; BDVER2-NEXT: .cfi_offset %esi, -8
; BDVER2-NEXT: movzwl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
@@ -1924,11 +1924,11 @@ define i16 @test_pop_push_16(i16 %a0, i16 *%a1) optsize {
; BDVER2-NEXT: #APP
; BDVER2-NEXT: popw %ax # sched: [5:0.50]
; BDVER2-NEXT: popw (%ecx) # sched: [6:1.00]
-; BDVER2-NEXT: pushw %ax # sched: [1:0.50]
+; BDVER2-NEXT: pushw %ax # sched: [1:1.00]
; BDVER2-NEXT: pushw (%ecx) # sched: [6:1.00]
; BDVER2-NEXT: pushw $4095 # imm = 0xFFF
-; BDVER2-NEXT: # sched: [1:0.50]
-; BDVER2-NEXT: pushw $7 # sched: [1:0.50]
+; BDVER2-NEXT: # sched: [1:1.00]
+; BDVER2-NEXT: pushw $7 # sched: [1:1.00]
; BDVER2-NEXT: #NO_APP
; BDVER2-NEXT: retl # sched: [5:1.00]
;
@@ -2091,11 +2091,11 @@ define i32 @test_pop_push_32(i32 %a0, i32 *%a1) optsize {
; BDVER2-NEXT: #APP
; BDVER2-NEXT: popl %eax # sched: [5:0.50]
; BDVER2-NEXT: popl (%ecx) # sched: [6:1.00]
-; BDVER2-NEXT: pushl %eax # sched: [1:0.50]
+; BDVER2-NEXT: pushl %eax # sched: [1:1.00]
; BDVER2-NEXT: pushl (%ecx) # sched: [6:1.00]
; BDVER2-NEXT: pushl $4095 # imm = 0xFFF
-; BDVER2-NEXT: # sched: [1:0.50]
-; BDVER2-NEXT: pushl $7 # sched: [1:0.50]
+; BDVER2-NEXT: # sched: [1:1.00]
+; BDVER2-NEXT: pushl $7 # sched: [1:1.00]
; BDVER2-NEXT: #NO_APP
; BDVER2-NEXT: retl # sched: [5:1.00]
;
@@ -2218,8 +2218,8 @@ define void @test_popa_popf_pusha_pushf() optsize {
; BDVER2-NEXT: #APP
; BDVER2-NEXT: popal # sched: [5:0.50]
; BDVER2-NEXT: popfl # sched: [5:0.50]
-; BDVER2-NEXT: pushal # sched: [1:0.50]
-; BDVER2-NEXT: pushfl # sched: [1:0.50]
+; BDVER2-NEXT: pushal # sched: [1:1.00]
+; BDVER2-NEXT: pushfl # sched: [1:1.00]
; BDVER2-NEXT: #NO_APP
; BDVER2-NEXT: retl # sched: [5:1.00]
;
diff --git a/llvm/test/CodeGen/X86/schedule-x86_64.ll b/llvm/test/CodeGen/X86/schedule-x86_64.ll
index 18541184eb8..c2772cc2318 100644
--- a/llvm/test/CodeGen/X86/schedule-x86_64.ll
+++ b/llvm/test/CodeGen/X86/schedule-x86_64.ll
@@ -8475,8 +8475,8 @@ define void @test_movnti(i32 %a0, i32 *%a1, i64 %a2, i64 *%a3) optsize {
; BDVER2-LABEL: test_movnti:
; BDVER2: # %bb.0:
; BDVER2-NEXT: #APP
-; BDVER2-NEXT: movntil %edi, (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: movntiq %rdx, (%rcx) # sched: [1:0.50]
+; BDVER2-NEXT: movntil %edi, (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: movntiq %rdx, (%rcx) # sched: [1:1.00]
; BDVER2-NEXT: #NO_APP
; BDVER2-NEXT: retq # sched: [5:1.00]
;
@@ -10658,11 +10658,11 @@ define i16 @test_pop_push_16(i16 %a0, i16 *%a1) optsize {
; BDVER2-NEXT: #APP
; BDVER2-NEXT: popw %ax # sched: [5:0.50]
; BDVER2-NEXT: popw (%rsi) # sched: [6:1.00]
-; BDVER2-NEXT: pushw %di # sched: [1:0.50]
+; BDVER2-NEXT: pushw %di # sched: [1:1.00]
; BDVER2-NEXT: pushw (%rsi) # sched: [6:1.00]
; BDVER2-NEXT: pushw $4095 # imm = 0xFFF
-; BDVER2-NEXT: # sched: [1:0.50]
-; BDVER2-NEXT: pushw $7 # sched: [1:0.50]
+; BDVER2-NEXT: # sched: [1:1.00]
+; BDVER2-NEXT: pushw $7 # sched: [1:1.00]
; BDVER2-NEXT: #NO_APP
; BDVER2-NEXT: retq # sched: [5:1.00]
;
@@ -10804,11 +10804,11 @@ define i64 @test_pop_push_64(i64 %a0, i64 *%a1) optsize {
; BDVER2-NEXT: #APP
; BDVER2-NEXT: popq %rax # sched: [5:0.50]
; BDVER2-NEXT: popq (%rsi) # sched: [6:1.00]
-; BDVER2-NEXT: pushq %rdi # sched: [1:0.50]
+; BDVER2-NEXT: pushq %rdi # sched: [1:1.00]
; BDVER2-NEXT: pushq (%rsi) # sched: [6:1.00]
; BDVER2-NEXT: pushq $4095 # imm = 0xFFF
-; BDVER2-NEXT: # sched: [1:0.50]
-; BDVER2-NEXT: pushq $7 # sched: [1:0.50]
+; BDVER2-NEXT: # sched: [1:1.00]
+; BDVER2-NEXT: pushq $7 # sched: [1:1.00]
; BDVER2-NEXT: #NO_APP
; BDVER2-NEXT: retq # sched: [5:1.00]
;
@@ -10910,7 +10910,7 @@ define void @test_popf_pushf() optsize {
; BDVER2: # %bb.0:
; BDVER2-NEXT: #APP
; BDVER2-NEXT: popfq # sched: [5:0.50]
-; BDVER2-NEXT: pushfq # sched: [1:0.50]
+; BDVER2-NEXT: pushfq # sched: [1:1.00]
; BDVER2-NEXT: #NO_APP
; BDVER2-NEXT: retq # sched: [5:1.00]
;
@@ -15157,18 +15157,18 @@ define void @test_setcc(i8 %a0, i8 *%a1) optsize {
; BDVER2-NEXT: setge %dil # sched: [1:0.50]
; BDVER2-NEXT: setle %dil # sched: [1:0.50]
; BDVER2-NEXT: setg %dil # sched: [1:0.50]
-; BDVER2-NEXT: seto (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: setno (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: setb (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: setae (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: sete (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: setne (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: setbe (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: seta (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: sets (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: setns (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: setp (%rsi) # sched: [1:0.50]
-; BDVER2-NEXT: setnp (%rsi) # sched: [1:0.50]
+; BDVER2-NEXT: seto (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: setno (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: setb (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: setae (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: sete (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: setne (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: setbe (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: seta (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: sets (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: setns (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: setp (%rsi) # sched: [1:1.00]
+; BDVER2-NEXT: setnp (%rsi) # sched: [1:1.00]
; BDVER2-NEXT: setl (%rsi) # sched: [1:1.00]
; BDVER2-NEXT: setge (%rsi) # sched: [1:1.00]
; BDVER2-NEXT: setle (%rsi) # sched: [1:1.00]
diff --git a/llvm/test/CodeGen/X86/sse-schedule.ll b/llvm/test/CodeGen/X86/sse-schedule.ll
index aca2ec8c5f5..40cf517de4f 100644
--- a/llvm/test/CodeGen/X86/sse-schedule.ll
+++ b/llvm/test/CodeGen/X86/sse-schedule.ll
@@ -2230,13 +2230,13 @@ define void @test_ldmxcsr(i32 %a0) {
;
; BDVER2-SSE-LABEL: test_ldmxcsr:
; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:0.50]
+; BDVER2-SSE-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; BDVER2-SSE-NEXT: ldmxcsr -{{[0-9]+}}(%rsp) # sched: [5:0.50]
; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
;
; BDVER2-LABEL: test_ldmxcsr:
; BDVER2: # %bb.0:
-; BDVER2-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:0.50]
+; BDVER2-NEXT: movl %edi, -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; BDVER2-NEXT: vldmxcsr -{{[0-9]+}}(%rsp) # sched: [5:0.50]
; BDVER2-NEXT: retq # sched: [5:1.00]
;
@@ -5290,12 +5290,12 @@ define void @test_sfence() {
;
; BDVER2-SSE-LABEL: test_sfence:
; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: sfence # sched: [1:0.50]
+; BDVER2-SSE-NEXT: sfence # sched: [1:1.00]
; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
;
; BDVER2-LABEL: test_sfence:
; BDVER2: # %bb.0:
-; BDVER2-NEXT: sfence # sched: [1:0.50]
+; BDVER2-NEXT: sfence # sched: [1:1.00]
; BDVER2-NEXT: retq # sched: [5:1.00]
;
; BTVER2-SSE-LABEL: test_sfence:
@@ -5847,13 +5847,13 @@ define i32 @test_stmxcsr() {
;
; BDVER2-SSE-LABEL: test_stmxcsr:
; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: stmxcsr -{{[0-9]+}}(%rsp) # sched: [1:0.50]
+; BDVER2-SSE-NEXT: stmxcsr -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; BDVER2-SSE-NEXT: movl -{{[0-9]+}}(%rsp), %eax # sched: [5:0.50]
; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
;
; BDVER2-LABEL: test_stmxcsr:
; BDVER2: # %bb.0:
-; BDVER2-NEXT: vstmxcsr -{{[0-9]+}}(%rsp) # sched: [1:0.50]
+; BDVER2-NEXT: vstmxcsr -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; BDVER2-NEXT: movl -{{[0-9]+}}(%rsp), %eax # sched: [5:0.50]
; BDVER2-NEXT: retq # sched: [5:1.00]
;
diff --git a/llvm/test/CodeGen/X86/sse2-schedule.ll b/llvm/test/CodeGen/X86/sse2-schedule.ll
index a833dcf0735..660ba8ebb79 100644
--- a/llvm/test/CodeGen/X86/sse2-schedule.ll
+++ b/llvm/test/CodeGen/X86/sse2-schedule.ll
@@ -3821,12 +3821,12 @@ define void @test_lfence() {
;
; BDVER2-SSE-LABEL: test_lfence:
; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: lfence # sched: [1:0.50]
+; BDVER2-SSE-NEXT: lfence # sched: [1:1.00]
; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
;
; BDVER2-LABEL: test_lfence:
; BDVER2: # %bb.0:
-; BDVER2-NEXT: lfence # sched: [1:0.50]
+; BDVER2-NEXT: lfence # sched: [1:1.00]
; BDVER2-NEXT: retq # sched: [5:1.00]
;
; BTVER2-SSE-LABEL: test_lfence:
@@ -3927,12 +3927,12 @@ define void @test_mfence() {
;
; BDVER2-SSE-LABEL: test_mfence:
; BDVER2-SSE: # %bb.0:
-; BDVER2-SSE-NEXT: mfence # sched: [1:0.50]
+; BDVER2-SSE-NEXT: mfence # sched: [1:1.00]
; BDVER2-SSE-NEXT: retq # sched: [5:1.00]
;
; BDVER2-LABEL: test_mfence:
; BDVER2: # %bb.0:
-; BDVER2-NEXT: mfence # sched: [1:0.50]
+; BDVER2-NEXT: mfence # sched: [1:1.00]
; BDVER2-NEXT: retq # sched: [5:1.00]
;
; BTVER2-SSE-LABEL: test_mfence:
diff --git a/llvm/test/CodeGen/X86/x87-schedule.ll b/llvm/test/CodeGen/X86/x87-schedule.ll
index 937a2c4561b..1921f8c75a3 100644
--- a/llvm/test/CodeGen/X86/x87-schedule.ll
+++ b/llvm/test/CodeGen/X86/x87-schedule.ll
@@ -2792,14 +2792,14 @@ define void @test_fist_fistp_fisttp(i16* %a0, i32* %a1, i64 *%a2) optsize {
; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
; BDVER2-NEXT: #APP
-; BDVER2-NEXT: fists (%edx) # sched: [1:0.50]
-; BDVER2-NEXT: fistl (%ecx) # sched: [1:0.50]
-; BDVER2-NEXT: fistps (%edx) # sched: [1:0.50]
-; BDVER2-NEXT: fistpl (%ecx) # sched: [1:0.50]
-; BDVER2-NEXT: fistpll (%eax) # sched: [1:0.50]
-; BDVER2-NEXT: fisttps (%edx) # sched: [1:0.50]
-; BDVER2-NEXT: fisttpl (%ecx) # sched: [1:0.50]
-; BDVER2-NEXT: fisttpll (%eax) # sched: [1:0.50]
+; BDVER2-NEXT: fists (%edx) # sched: [1:1.00]
+; BDVER2-NEXT: fistl (%ecx) # sched: [1:1.00]
+; BDVER2-NEXT: fistps (%edx) # sched: [1:1.00]
+; BDVER2-NEXT: fistpl (%ecx) # sched: [1:1.00]
+; BDVER2-NEXT: fistpll (%eax) # sched: [1:1.00]
+; BDVER2-NEXT: fisttps (%edx) # sched: [1:1.00]
+; BDVER2-NEXT: fisttpl (%ecx) # sched: [1:1.00]
+; BDVER2-NEXT: fisttpll (%eax) # sched: [1:1.00]
; BDVER2-NEXT: #NO_APP
; BDVER2-NEXT: retl # sched: [5:1.00]
;
@@ -4672,12 +4672,12 @@ define void @test_fst_fstp(i16* %a0, i32* %a1, i64 *%a2) optsize {
; BDVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
; BDVER2-NEXT: #APP
; BDVER2-NEXT: fst %st(0) # sched: [1:0.50]
-; BDVER2-NEXT: fsts (%edx) # sched: [1:0.50]
-; BDVER2-NEXT: fstl (%ecx) # sched: [1:0.50]
+; BDVER2-NEXT: fsts (%edx) # sched: [1:1.00]
+; BDVER2-NEXT: fstl (%ecx) # sched: [1:1.00]
; BDVER2-NEXT: fstp %st(0) # sched: [1:0.50]
-; BDVER2-NEXT: fstpl (%edx) # sched: [1:0.50]
-; BDVER2-NEXT: fstpl (%ecx) # sched: [1:0.50]
-; BDVER2-NEXT: fstpt (%eax) # sched: [1:0.50]
+; BDVER2-NEXT: fstpl (%edx) # sched: [1:1.00]
+; BDVER2-NEXT: fstpl (%ecx) # sched: [1:1.00]
+; BDVER2-NEXT: fstpt (%eax) # sched: [1:1.00]
; BDVER2-NEXT: #NO_APP
; BDVER2-NEXT: retl # sched: [5:1.00]
;
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