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-rw-r--r--llvm/test/CodeGen/Hexagon/cmpb-dec-imm.ll30
-rw-r--r--llvm/test/CodeGen/Hexagon/cmph-gtu.ll46
2 files changed, 76 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/cmpb-dec-imm.ll b/llvm/test/CodeGen/Hexagon/cmpb-dec-imm.ll
new file mode 100644
index 00000000000..d3b48e6b294
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/cmpb-dec-imm.ll
@@ -0,0 +1,30 @@
+; RUN: llc -march=hexagon -debug-only=isel < %s 2>&1 | FileCheck %s
+; REQUIRES: asserts
+
+; Check that we generate 'cmpb.gtu' instruction for a byte comparision
+; The "Optimized Lowered Selection" converts the "ugt with #40" to
+; "ult with #41". The immediate value should be decremented to #40
+; with the selected cmpb.gtu pattern
+; CHECK: setcc{{.*}}41{{.*}}setult
+; CHECK: A4_cmpbgtui{{.*}}40
+
+@glob = common global i8 0, align 1
+
+define i32 @cmpgtudec(i32 %a0, i32 %a1) #0 {
+b2:
+ %v3 = xor i32 %a1, %a0
+ %v4 = and i32 %v3, 255
+ %v5 = icmp ugt i32 %v4, 40
+ br i1 %v5, label %b6, label %b8
+
+b6: ; preds = %b2
+ %v7 = trunc i32 %a0 to i8
+ store i8 %v7, i8* @glob, align 1
+ br label %b8
+
+b8: ; preds = %b6, %b2
+ %v9 = phi i32 [ 1, %b6 ], [ 0, %b2 ]
+ ret i32 %v9
+}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/Hexagon/cmph-gtu.ll b/llvm/test/CodeGen/Hexagon/cmph-gtu.ll
new file mode 100644
index 00000000000..f5feb7bc6fb
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/cmph-gtu.ll
@@ -0,0 +1,46 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Check that we generate 'cmph.gtu' instruction.
+; CHECK-LABEL: @cmphgtu
+; CHECK: cmph.gtu
+
+@glob = common global i8 0, align 1
+
+define i32 @cmphgtu(i32 %a0, i32 %a1) #0 {
+b2:
+ %v3 = xor i32 %a1, %a0
+ %v4 = and i32 %v3, 65535
+ %v5 = icmp ugt i32 %v4, 40
+ br i1 %v5, label %b6, label %b8
+
+b6: ; preds = %b2
+ %v7 = trunc i32 %a0 to i8
+ store i8 %v7, i8* @glob, align 1
+ br label %b8
+
+b8: ; preds = %b6, %b2
+ %v9 = phi i32 [ 1, %b6 ], [ 0, %b2 ]
+ ret i32 %v9
+}
+
+; With zxtb, we must not generate a cmph.gtu instruction.
+; CHECK-LABEL: @nocmphgtu
+; CHECK-NOT: cmph.gtu
+define i32 @nocmphgtu(i32 %a0, i32 %a1) #0 {
+b2:
+ %v3 = xor i32 %a1, %a0
+ %v4 = and i32 %v3, 255
+ %v5 = icmp ugt i32 %v4, 40
+ br i1 %v5, label %b6, label %b8
+
+b6: ; preds = %b2
+ %v7 = trunc i32 %a0 to i8
+ store i8 %v7, i8* @glob, align 1
+ br label %b8
+
+b8: ; preds = %b6, %b2
+ %v9 = phi i32 [ 1, %b6 ], [ 0, %b2 ]
+ ret i32 %v9
+}
+
+attributes #0 = { nounwind }
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