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-rw-r--r--llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll2
-rw-r--r--llvm/test/CodeGen/Thumb/addr-modes.ll4
2 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
index 22c6c924597..47ca6054f52 100644
--- a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
+++ b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
@@ -492,7 +492,7 @@ done:
%struct.foo = type { [3 x float], [3 x float] }
; OPT-LABEL: @sink_ds_address(
-; OPT: getelementptr i8,
+; OPT: getelementptr inbounds i8,
; GCN-LABEL: {{^}}sink_ds_address:
; GCN: s_load_dword [[SREG1:s[0-9]+]],
diff --git a/llvm/test/CodeGen/Thumb/addr-modes.ll b/llvm/test/CodeGen/Thumb/addr-modes.ll
index e6ed01d0547..e04d483fc78 100644
--- a/llvm/test/CodeGen/Thumb/addr-modes.ll
+++ b/llvm/test/CodeGen/Thumb/addr-modes.ll
@@ -14,7 +14,7 @@ target triple = "thumbv6m-arm-none-eabi"
; Test case 01: %n is scaled by 4 (size of i32).
; Expected: GEP cannot be folded into LOAD.
-; CHECK: local addrmode: [Base:%arrayidx]
+; CHECK: local addrmode: [inbounds Base:%arrayidx]
define i32 @load01(i32* %p, i32 %n) nounwind {
entry:
%arrayidx = getelementptr inbounds i32, i32* %p, i32 %n
@@ -24,7 +24,7 @@ entry:
; Test case 02: No scale of %n is needed because the size of i8 is 1.
; Expected: GEP can be folded into LOAD.
-; CHECK: local addrmode: [Base:%p + 1*%n]
+; CHECK: local addrmode: [inbounds Base:%p + 1*%n]
define i8 @load02(i8* %p, i32 %n) nounwind {
entry:
%arrayidx = getelementptr inbounds i8, i8* %p, i32 %n
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