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-rw-r--r--llvm/test/CodeGen/X86/arg-copy-elide.ll7
-rw-r--r--llvm/test/CodeGen/X86/nontemporal.ll72
-rw-r--r--llvm/test/CodeGen/X86/store-narrow.ll5
-rw-r--r--llvm/test/CodeGen/X86/swift-return.ll6
-rw-r--r--llvm/test/CodeGen/X86/win32-spill-xmm.ll2
-rw-r--r--llvm/test/CodeGen/X86/win64_sibcall.ll4
-rw-r--r--llvm/test/CodeGen/X86/win64_vararg.ll4
-rw-r--r--llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll4
8 files changed, 43 insertions, 61 deletions
diff --git a/llvm/test/CodeGen/X86/arg-copy-elide.ll b/llvm/test/CodeGen/X86/arg-copy-elide.ll
index b9a2eeeb7f8..126f5a1c797 100644
--- a/llvm/test/CodeGen/X86/arg-copy-elide.ll
+++ b/llvm/test/CodeGen/X86/arg-copy-elide.ll
@@ -253,9 +253,7 @@ entry:
; CHECK: calll _addrof_i32
; CHECK: retl
-
; Don't elide the copy when the alloca is escaped with a store.
-
define void @escape_with_store(i32 %x) {
%x1 = alloca i32
%x2 = alloca i32*
@@ -268,9 +266,8 @@ define void @escape_with_store(i32 %x) {
}
; CHECK-LABEL: _escape_with_store:
-; CHECK-DAG: movl {{.*}}(%esp), %[[reg:[^ ]*]]
-; CHECK-DAG: movl $0, [[offs:[0-9]*]](%esp)
-; CHECK: movl %[[reg]], [[offs]](%esp)
+; CHECK: movl {{.*}}(%esp), %[[reg:[^ ]*]]
+; CHECK: movl %[[reg]], [[offs:[0-9]*]](%esp)
; CHECK: calll _addrof_i32
diff --git a/llvm/test/CodeGen/X86/nontemporal.ll b/llvm/test/CodeGen/X86/nontemporal.ll
index 33d5caba597..d49c8872433 100644
--- a/llvm/test/CodeGen/X86/nontemporal.ll
+++ b/llvm/test/CodeGen/X86/nontemporal.ll
@@ -9,33 +9,29 @@ define void @f(<4 x float> %A, i8* %B, <2 x double> %C, i32 %D, <2 x i64> %E, <4
; X32-SSE: # BB#0:
; X32-SSE-NEXT: pushl %ebp
; X32-SSE-NEXT: movl %esp, %ebp
-; X32-SSE-NEXT: pushl %esi
; X32-SSE-NEXT: andl $-16, %esp
; X32-SSE-NEXT: subl $16, %esp
; X32-SSE-NEXT: movl 72(%ebp), %eax
; X32-SSE-NEXT: movl 76(%ebp), %ecx
-; X32-SSE-NEXT: movl 12(%ebp), %edx
; X32-SSE-NEXT: movdqa 56(%ebp), %xmm3
; X32-SSE-NEXT: movdqa 40(%ebp), %xmm4
; X32-SSE-NEXT: movdqa 24(%ebp), %xmm5
-; X32-SSE-NEXT: movl 8(%ebp), %esi
-; X32-SSE-NEXT: addps .LCPI0_0, %xmm0
-; X32-SSE-NEXT: movntps %xmm0, (%esi)
-; X32-SSE-NEXT: paddq .LCPI0_1, %xmm2
-; X32-SSE-NEXT: movntdq %xmm2, (%esi)
-; X32-SSE-NEXT: addpd .LCPI0_2, %xmm1
-; X32-SSE-NEXT: movntpd %xmm1, (%esi)
-; X32-SSE-NEXT: paddd .LCPI0_3, %xmm5
-; X32-SSE-NEXT: movntdq %xmm5, (%esi)
-; X32-SSE-NEXT: paddw .LCPI0_4, %xmm4
-; X32-SSE-NEXT: movntdq %xmm4, (%esi)
-; X32-SSE-NEXT: paddb .LCPI0_5, %xmm3
-; X32-SSE-NEXT: movntdq %xmm3, (%esi)
-; X32-SSE-NEXT: movntil %edx, (%esi)
-; X32-SSE-NEXT: movntil %ecx, 4(%esi)
-; X32-SSE-NEXT: movntil %eax, (%esi)
-; X32-SSE-NEXT: leal -4(%ebp), %esp
-; X32-SSE-NEXT: popl %esi
+; X32-SSE-NEXT: movl 8(%ebp), %edx
+; X32-SSE-NEXT: addps {{\.LCPI.*}}, %xmm0
+; X32-SSE-NEXT: movntps %xmm0, (%edx)
+; X32-SSE-NEXT: paddq {{\.LCPI.*}}, %xmm2
+; X32-SSE-NEXT: movntdq %xmm2, (%edx)
+; X32-SSE-NEXT: addpd {{\.LCPI.*}}, %xmm1
+; X32-SSE-NEXT: movntpd %xmm1, (%edx)
+; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm5
+; X32-SSE-NEXT: movntdq %xmm5, (%edx)
+; X32-SSE-NEXT: paddw {{\.LCPI.*}}, %xmm4
+; X32-SSE-NEXT: movntdq %xmm4, (%edx)
+; X32-SSE-NEXT: paddb {{\.LCPI.*}}, %xmm3
+; X32-SSE-NEXT: movntdq %xmm3, (%edx)
+; X32-SSE-NEXT: movntil %ecx, 4(%edx)
+; X32-SSE-NEXT: movntil %eax, (%edx)
+; X32-SSE-NEXT: movl %ebp, %esp
; X32-SSE-NEXT: popl %ebp
; X32-SSE-NEXT: retl
;
@@ -43,33 +39,29 @@ define void @f(<4 x float> %A, i8* %B, <2 x double> %C, i32 %D, <2 x i64> %E, <4
; X32-AVX: # BB#0:
; X32-AVX-NEXT: pushl %ebp
; X32-AVX-NEXT: movl %esp, %ebp
-; X32-AVX-NEXT: pushl %esi
; X32-AVX-NEXT: andl $-16, %esp
; X32-AVX-NEXT: subl $16, %esp
; X32-AVX-NEXT: movl 72(%ebp), %eax
; X32-AVX-NEXT: movl 76(%ebp), %ecx
-; X32-AVX-NEXT: movl 12(%ebp), %edx
; X32-AVX-NEXT: vmovdqa 56(%ebp), %xmm3
; X32-AVX-NEXT: vmovdqa 40(%ebp), %xmm4
; X32-AVX-NEXT: vmovdqa 24(%ebp), %xmm5
-; X32-AVX-NEXT: movl 8(%ebp), %esi
-; X32-AVX-NEXT: vaddps .LCPI0_0, %xmm0, %xmm0
-; X32-AVX-NEXT: vmovntps %xmm0, (%esi)
-; X32-AVX-NEXT: vpaddq .LCPI0_1, %xmm2, %xmm0
-; X32-AVX-NEXT: vmovntdq %xmm0, (%esi)
-; X32-AVX-NEXT: vaddpd .LCPI0_2, %xmm1, %xmm0
-; X32-AVX-NEXT: vmovntpd %xmm0, (%esi)
-; X32-AVX-NEXT: vpaddd .LCPI0_3, %xmm5, %xmm0
-; X32-AVX-NEXT: vmovntdq %xmm0, (%esi)
-; X32-AVX-NEXT: vpaddw .LCPI0_4, %xmm4, %xmm0
-; X32-AVX-NEXT: vmovntdq %xmm0, (%esi)
-; X32-AVX-NEXT: vpaddb .LCPI0_5, %xmm3, %xmm0
-; X32-AVX-NEXT: vmovntdq %xmm0, (%esi)
-; X32-AVX-NEXT: movntil %edx, (%esi)
-; X32-AVX-NEXT: movntil %ecx, 4(%esi)
-; X32-AVX-NEXT: movntil %eax, (%esi)
-; X32-AVX-NEXT: leal -4(%ebp), %esp
-; X32-AVX-NEXT: popl %esi
+; X32-AVX-NEXT: movl 8(%ebp), %edx
+; X32-AVX-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-AVX-NEXT: vmovntps %xmm0, (%edx)
+; X32-AVX-NEXT: vpaddq {{\.LCPI.*}}, %xmm2, %xmm0
+; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
+; X32-AVX-NEXT: vaddpd {{\.LCPI.*}}, %xmm1, %xmm0
+; X32-AVX-NEXT: vmovntpd %xmm0, (%edx)
+; X32-AVX-NEXT: vpaddd {{\.LCPI.*}}, %xmm5, %xmm0
+; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
+; X32-AVX-NEXT: vpaddw {{\.LCPI.*}}, %xmm4, %xmm0
+; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
+; X32-AVX-NEXT: vpaddb {{\.LCPI.*}}, %xmm3, %xmm0
+; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
+; X32-AVX-NEXT: movntil %ecx, 4(%edx)
+; X32-AVX-NEXT: movntil %eax, (%edx)
+; X32-AVX-NEXT: movl %ebp, %esp
; X32-AVX-NEXT: popl %ebp
; X32-AVX-NEXT: retl
;
diff --git a/llvm/test/CodeGen/X86/store-narrow.ll b/llvm/test/CodeGen/X86/store-narrow.ll
index 16f152d169d..5e9e1e364fe 100644
--- a/llvm/test/CodeGen/X86/store-narrow.ll
+++ b/llvm/test/CodeGen/X86/store-narrow.ll
@@ -134,10 +134,7 @@ entry:
@g_16 = internal global i32 -1
; X64-LABEL: test8:
-; X64-NEXT: movl _g_16(%rip), %eax
-; X64-NEXT: movl $0, _g_16(%rip)
-; X64-NEXT: orl $1, %eax
-; X64-NEXT: movl %eax, _g_16(%rip)
+; X64-NEXT: orb $1, _g_16(%rip)
; X64-NEXT: ret
define void @test8() nounwind {
%tmp = load i32, i32* @g_16
diff --git a/llvm/test/CodeGen/X86/swift-return.ll b/llvm/test/CodeGen/X86/swift-return.ll
index 60e33e62b4a..0ea176d5d82 100644
--- a/llvm/test/CodeGen/X86/swift-return.ll
+++ b/llvm/test/CodeGen/X86/swift-return.ll
@@ -184,11 +184,11 @@ define void @consume_i1_ret() {
%v6 = extractvalue { i1, i1, i1, i1 } %call, 2
%v7 = extractvalue { i1, i1, i1, i1 } %call, 3
%val = zext i1 %v3 to i32
- store i32 %val, i32* @var
+ store volatile i32 %val, i32* @var
%val2 = zext i1 %v5 to i32
- store i32 %val2, i32* @var
+ store volatile i32 %val2, i32* @var
%val3 = zext i1 %v6 to i32
- store i32 %val3, i32* @var
+ store volatile i32 %val3, i32* @var
%val4 = zext i1 %v7 to i32
store i32 %val4, i32* @var
ret void
diff --git a/llvm/test/CodeGen/X86/win32-spill-xmm.ll b/llvm/test/CodeGen/X86/win32-spill-xmm.ll
index 0db97cfe20f..c6b163b88b2 100644
--- a/llvm/test/CodeGen/X86/win32-spill-xmm.ll
+++ b/llvm/test/CodeGen/X86/win32-spill-xmm.ll
@@ -20,7 +20,7 @@ declare void @bar(<16 x float> %a, i32 %b)
; Check that proper alignment of spilled vector does not affect vargs
; CHECK-LABEL: vargs_not_affected
-; CHECK: leal 28(%ebp), %eax
+; CHECK: movl 28(%ebp), %eax
define i32 @vargs_not_affected(<4 x float> %v, i8* %f, ...) {
entry:
%ap = alloca i8*, align 4
diff --git a/llvm/test/CodeGen/X86/win64_sibcall.ll b/llvm/test/CodeGen/X86/win64_sibcall.ll
index 4bba0e1e0ac..42dd4d31ca9 100644
--- a/llvm/test/CodeGen/X86/win64_sibcall.ll
+++ b/llvm/test/CodeGen/X86/win64_sibcall.ll
@@ -12,8 +12,8 @@ entry:
; LINUX: movq $0, -8(%rsp)
%this = alloca %Object addrspace(1)*
- store %Object addrspace(1)* null, %Object addrspace(1)** %this
- store %Object addrspace(1)* %param0, %Object addrspace(1)** %this
+ store volatile %Object addrspace(1)* null, %Object addrspace(1)** %this
+ store volatile %Object addrspace(1)* %param0, %Object addrspace(1)** %this
br label %0
; <label>:0 ; preds = %entry
diff --git a/llvm/test/CodeGen/X86/win64_vararg.ll b/llvm/test/CodeGen/X86/win64_vararg.ll
index 8d7f2010a54..20386bf3639 100644
--- a/llvm/test/CodeGen/X86/win64_vararg.ll
+++ b/llvm/test/CodeGen/X86/win64_vararg.ll
@@ -94,9 +94,7 @@ entry:
; CHECK-LABEL: arg4:
; CHECK: pushq
-; va_start:
-; CHECK: leaq 48(%rsp), [[REG_arg4_1:%[a-z]+]]
-; CHECK: movq [[REG_arg4_1]], (%rsp)
+; va_start (optimized away as overwritten by va_arg)
; va_arg:
; CHECK: leaq 52(%rsp), [[REG_arg4_2:%[a-z]+]]
; CHECK: movq [[REG_arg4_2]], (%rsp)
diff --git a/llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll b/llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll
index e3436521a5b..299190e8a59 100644
--- a/llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll
+++ b/llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll
@@ -90,9 +90,7 @@ entry:
}
; CHECK-LABEL: arg4:
-; va_start:
-; CHECK: leaq 48(%rsp), [[REG_arg4_1:%[a-z]+]]
-; CHECK: movq [[REG_arg4_1]], (%rsp)
+; va_start (optimized away as overwritten by va_arg)
; va_arg:
; CHECK: leaq 52(%rsp), [[REG_arg4_2:%[a-z]+]]
; CHECK: movq [[REG_arg4_2]], (%rsp)
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