4 files changed, 18 insertions, 66 deletions
diff --git a/llvm/test/CodeGen/X86/combine-add-ssat.ll b/llvm/test/CodeGen/X86/combine-add-ssat.ll
index 1da322976a8..217e91a62a4 100644
--- a/llvm/test/CodeGen/X86/combine-add-ssat.ll
+++ b/llvm/test/CodeGen/X86/combine-add-ssat.ll
@@ -17,10 +17,10 @@ define i32 @combine_constant_i32(i32 %a0) {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    movl %edi, %ecx
-; CHECK-NEXT:    addl $1, %ecx
+; CHECK-NEXT:    incl %ecx
 ; CHECK-NEXT:    setns %al
 ; CHECK-NEXT:    addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK-NEXT:    addl $1, %edi
+; CHECK-NEXT:    incl %edi
 ; CHECK-NEXT:    cmovnol %edi, %eax
 ; CHECK-NEXT:    retq
   %res = call i32 @llvm.sadd.sat.i32(i32 1, i32 %a0);
@@ -45,30 +45,16 @@ define <8 x i16> @combine_constant_v8i16(<8 x i16> %a0) {
 define i32 @combine_zero_i32(i32 %a0) {
 ; CHECK-LABEL: combine_zero_i32:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    movl %edi, %ecx
-; CHECK-NEXT:    addl $0, %ecx
-; CHECK-NEXT:    setns %al
-; CHECK-NEXT:    addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK-NEXT:    addl $0, %edi
-; CHECK-NEXT:    cmovnol %edi, %eax
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %1 = call i32 @llvm.sadd.sat.i32(i32 %a0, i32 0);
   ret i32 %1
 }
 
 define <8 x i16> @combine_zero_v8i16(<8 x i16> %a0) {
-; SSE-LABEL: combine_zero_v8i16:
-; SSE:       # %bb.0:
-; SSE-NEXT:    pxor %xmm1, %xmm1
-; SSE-NEXT:    paddsw %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_zero_v8i16:
-; AVX:       # %bb.0:
-; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT:    vpaddsw %xmm1, %xmm0, %xmm0
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_zero_v8i16:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    retq
   %1 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer);
   ret <8 x i16> %1
 }
diff --git a/llvm/test/CodeGen/X86/combine-add-usat.ll b/llvm/test/CodeGen/X86/combine-add-usat.ll
index 531f74490ed..9492320e677 100644
--- a/llvm/test/CodeGen/X86/combine-add-usat.ll
+++ b/llvm/test/CodeGen/X86/combine-add-usat.ll
@@ -41,26 +41,16 @@ define <8 x i16> @combine_constant_v8i16(<8 x i16> %a0) {
 define i32 @combine_zero_i32(i32 %a0) {
 ; CHECK-LABEL: combine_zero_i32:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    addl $0, %edi
-; CHECK-NEXT:    movl $-1, %eax
-; CHECK-NEXT:    cmovael %edi, %eax
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %1 = call i32 @llvm.uadd.sat.i32(i32 %a0, i32 0);
   ret i32 %1
 }
 
 define <8 x i16> @combine_zero_v8i16(<8 x i16> %a0) {
-; SSE-LABEL: combine_zero_v8i16:
-; SSE:       # %bb.0:
-; SSE-NEXT:    pxor %xmm1, %xmm1
-; SSE-NEXT:    paddusw %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_zero_v8i16:
-; AVX:       # %bb.0:
-; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT:    vpaddusw %xmm1, %xmm0, %xmm0
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_zero_v8i16:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    retq
   %1 = call <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer);
   ret <8 x i16> %1
 }
diff --git a/llvm/test/CodeGen/X86/combine-sub-ssat.ll b/llvm/test/CodeGen/X86/combine-sub-ssat.ll
index 8d53300f33b..a17573d2f61 100644
--- a/llvm/test/CodeGen/X86/combine-sub-ssat.ll
+++ b/llvm/test/CodeGen/X86/combine-sub-ssat.ll
@@ -15,30 +15,16 @@ declare  <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16>, <8 x i16>)
 define i32 @combine_zero_i32(i32 %a0) {
 ; CHECK-LABEL: combine_zero_i32:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    movl %edi, %ecx
-; CHECK-NEXT:    subl $0, %ecx
-; CHECK-NEXT:    setns %al
-; CHECK-NEXT:    addl $2147483647, %eax # imm = 0x7FFFFFFF
-; CHECK-NEXT:    subl $0, %edi
-; CHECK-NEXT:    cmovnol %edi, %eax
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %1 = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 0);
   ret i32 %1
 }
 
 define <8 x i16> @combine_zero_v8i16(<8 x i16> %a0) {
-; SSE-LABEL: combine_zero_v8i16:
-; SSE:       # %bb.0:
-; SSE-NEXT:    pxor %xmm1, %xmm1
-; SSE-NEXT:    psubsw %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_zero_v8i16:
-; AVX:       # %bb.0:
-; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT:    vpsubsw %xmm1, %xmm0, %xmm0
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_zero_v8i16:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    retq
   %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer);
   ret <8 x i16> %1
 }
diff --git a/llvm/test/CodeGen/X86/combine-sub-usat.ll b/llvm/test/CodeGen/X86/combine-sub-usat.ll
index 0568b28be4e..94d8aece4a1 100644
--- a/llvm/test/CodeGen/X86/combine-sub-usat.ll
+++ b/llvm/test/CodeGen/X86/combine-sub-usat.ll
@@ -15,26 +15,16 @@ declare  <8 x i16> @llvm.usub.sat.v8i16(<8 x i16>, <8 x i16>)
 define i32 @combine_zero_i32(i32 %a0) {
 ; CHECK-LABEL: combine_zero_i32:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    subl $0, %edi
-; CHECK-NEXT:    cmovael %edi, %eax
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %1 = call i32 @llvm.usub.sat.i32(i32 %a0, i32 0);
   ret i32 %1
 }
 
 define <8 x i16> @combine_zero_v8i16(<8 x i16> %a0) {
-; SSE-LABEL: combine_zero_v8i16:
-; SSE:       # %bb.0:
-; SSE-NEXT:    pxor %xmm1, %xmm1
-; SSE-NEXT:    psubusw %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_zero_v8i16:
-; AVX:       # %bb.0:
-; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT:    vpsubusw %xmm1, %xmm0, %xmm0
-; AVX-NEXT:    retq
+; CHECK-LABEL: combine_zero_v8i16:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    retq
   %1 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer);
   ret <8 x i16> %1
 }