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-rw-r--r--llvm/test/CodeGen/X86/avx512-insert-extract.ll12
-rw-r--r--llvm/test/CodeGen/X86/avx512-vbroadcast.ll8
2 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/X86/avx512-insert-extract.ll b/llvm/test/CodeGen/X86/avx512-insert-extract.ll
index 189bdd76c98..d0e8c2834d8 100644
--- a/llvm/test/CodeGen/X86/avx512-insert-extract.ll
+++ b/llvm/test/CodeGen/X86/avx512-insert-extract.ll
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
-;CHECK: test1
+;CHECK-LABEL: test1:
;CHECK: vinsertps
;CHECK: vinsertf32x4
;CHECK: ret
@@ -11,7 +11,7 @@ define <16 x float> @test1(<16 x float> %x, float* %br, float %y) nounwind {
ret <16 x float> %rrr3
}
-;CHECK: test2
+;CHECK-LABEL: test2:
;CHECK: vinsertf32x4
;CHECK: vextractf32x4
;CHECK: vinsertf32x4
@@ -23,7 +23,7 @@ define <8 x double> @test2(<8 x double> %x, double* %br, double %y) nounwind {
ret <8 x double> %rrr3
}
-;CHECK: test3
+;CHECK-LABEL: test3:
;CHECK: vextractf32x4
;CHECK: vinsertf32x4
;CHECK: ret
@@ -33,7 +33,7 @@ define <16 x float> @test3(<16 x float> %x) nounwind {
ret <16 x float> %rrr2
}
-;CHECK: test4
+;CHECK-LABEL: test4:
;CHECK: vextracti32x4
;CHECK: vinserti32x4
;CHECK: ret
@@ -43,7 +43,7 @@ define <8 x i64> @test4(<8 x i64> %x) nounwind {
ret <8 x i64> %rrr2
}
-;CHECK: test5
+;CHECK-LABEL: test5:
;CHECK: vextractpsz
;CHECK: ret
define i32 @test5(<4 x float> %x) nounwind {
@@ -52,7 +52,7 @@ define i32 @test5(<4 x float> %x) nounwind {
ret i32 %ei
}
-;CHECK: test6
+;CHECK-LABEL: test6:
;CHECK: vextractpsz {{.*}}, (%rdi)
;CHECK: ret
define void @test6(<4 x float> %x, float* %out) nounwind {
diff --git a/llvm/test/CodeGen/X86/avx512-vbroadcast.ll b/llvm/test/CodeGen/X86/avx512-vbroadcast.ll
index 4f07f942f2e..d4ba6bd2b8f 100644
--- a/llvm/test/CodeGen/X86/avx512-vbroadcast.ll
+++ b/llvm/test/CodeGen/X86/avx512-vbroadcast.ll
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
-;CHECK: _inreg16xi32
+;CHECK-LABEL: _inreg16xi32:
;CHECK: vpbroadcastd {{.*}}, %zmm
;CHECK: ret
define <16 x i32> @_inreg16xi32(i32 %a) {
@@ -9,7 +9,7 @@ define <16 x i32> @_inreg16xi32(i32 %a) {
ret <16 x i32> %c
}
-;CHECK: _inreg8xi64
+;CHECK-LABEL: _inreg8xi64:
;CHECK: vpbroadcastq {{.*}}, %zmm
;CHECK: ret
define <8 x i64> @_inreg8xi64(i64 %a) {
@@ -18,7 +18,7 @@ define <8 x i64> @_inreg8xi64(i64 %a) {
ret <8 x i64> %c
}
-;CHECK: _inreg16xfloat
+;CHECK-LABEL: _inreg16xfloat:
;CHECK: vbroadcastssz {{.*}}, %zmm
;CHECK: ret
define <16 x float> @_inreg16xfloat(float %a) {
@@ -27,7 +27,7 @@ define <16 x float> @_inreg16xfloat(float %a) {
ret <16 x float> %c
}
-;CHECK: _inreg8xdouble
+;CHECK-LABEL: _inreg8xdouble:
;CHECK: vbroadcastsdz {{.*}}, %zmm
;CHECK: ret
define <8 x double> @_inreg8xdouble(double %a) {
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