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-rw-r--r--llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll4
-rw-r--r--llvm/test/CodeGen/X86/add.ll6
-rw-r--r--llvm/test/CodeGen/X86/avx-splat.ll7
-rw-r--r--llvm/test/CodeGen/X86/avx512-cmp.ll5
-rw-r--r--llvm/test/CodeGen/X86/bt.ll10
-rw-r--r--llvm/test/CodeGen/X86/critical-edge-split-2.ll5
-rw-r--r--llvm/test/CodeGen/X86/fp-une-cmp.ll4
-rw-r--r--llvm/test/CodeGen/X86/jump_sign.ll4
-rw-r--r--llvm/test/CodeGen/X86/machine-cse.ll4
-rw-r--r--llvm/test/CodeGen/X86/shift-double.ll24
-rw-r--r--llvm/test/CodeGen/X86/sink-hoist.ll3
-rw-r--r--llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll16
-rw-r--r--llvm/test/CodeGen/X86/testb-je-fusion.ll3
13 files changed, 58 insertions, 37 deletions
diff --git a/llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll b/llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
index 03442d631ac..fa8932b5170 100644
--- a/llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
+++ b/llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
@@ -4,8 +4,8 @@ target triple = "i686-pc-linux-gnu"
define i32 @a(i32 %x) nounwind {
entry:
- %cmp = icmp ult i32 %x, -2147483648 ; <i1> [#uses=1]
- br i1 %cmp, label %if.end, label %if.then
+ %cmp = icmp uge i32 %x, -2147483648 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%call = call i32 (...) @b() ; <i32> [#uses=0]
diff --git a/llvm/test/CodeGen/X86/add.ll b/llvm/test/CodeGen/X86/add.ll
index df1bc9b6ee7..48f40463d0e 100644
--- a/llvm/test/CodeGen/X86/add.ll
+++ b/llvm/test/CodeGen/X86/add.ll
@@ -30,7 +30,8 @@ entry:
%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
%sum = extractvalue {i32, i1} %t, 0
%obit = extractvalue {i32, i1} %t, 1
- br i1 %obit, label %overflow, label %normal
+ %notobit = xor i1 1, %obit
+ br i1 %notobit, label %normal, label %overflow
normal:
store i32 0, i32* %X
@@ -53,7 +54,8 @@ entry:
%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
%sum = extractvalue {i32, i1} %t, 0
%obit = extractvalue {i32, i1} %t, 1
- br i1 %obit, label %carry, label %normal
+ %notobit = xor i1 1, %obit
+ br i1 %notobit, label %normal, label %carry
normal:
store i32 0, i32* %X
diff --git a/llvm/test/CodeGen/X86/avx-splat.ll b/llvm/test/CodeGen/X86/avx-splat.ll
index 1914b5134be..314b50abbb3 100644
--- a/llvm/test/CodeGen/X86/avx-splat.ll
+++ b/llvm/test/CodeGen/X86/avx-splat.ll
@@ -62,8 +62,10 @@ define <8 x float> @funcE() nounwind {
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: ## implicit-def: %YMM0
; CHECK-NEXT: testb %al, %al
-; CHECK-NEXT: jne LBB4_2
-; CHECK-NEXT: ## BB#1: ## %load.i1247
+; CHECK-NEXT: je LBB4_1
+; CHECK-NEXT: ## BB#2: ## %__load_and_broadcast_32.exit1249
+; CHECK-NEXT: retq
+; CHECK-NEXT: LBB4_1: ## %load.i1247
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: movq %rsp, %rbp
; CHECK-NEXT: andq $-32, %rsp
@@ -71,7 +73,6 @@ define <8 x float> @funcE() nounwind {
; CHECK-NEXT: vbroadcastss {{[0-9]+}}(%rsp), %ymm0
; CHECK-NEXT: movq %rbp, %rsp
; CHECK-NEXT: popq %rbp
-; CHECK-NEXT: LBB4_2: ## %__load_and_broadcast_32.exit1249
; CHECK-NEXT: retq
allocas:
%udx495 = alloca [18 x [18 x float]], align 32
diff --git a/llvm/test/CodeGen/X86/avx512-cmp.ll b/llvm/test/CodeGen/X86/avx512-cmp.ll
index 78df51be5c3..e556495bfb4 100644
--- a/llvm/test/CodeGen/X86/avx512-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx512-cmp.ll
@@ -69,13 +69,14 @@ define float @test5(float %p) #0 {
; ALL-NEXT: vxorps %xmm1, %xmm1, %xmm1
; ALL-NEXT: vucomiss %xmm1, %xmm0
; ALL-NEXT: jne LBB3_1
-; ALL-NEXT: jnp LBB3_2
+; ALL-NEXT: jp LBB3_1
+; ALL-NEXT: ## BB#2: ## %return
+; ALL-NEXT: retq
; ALL-NEXT: LBB3_1: ## %if.end
; ALL-NEXT: seta %al
; ALL-NEXT: movzbl %al, %eax
; ALL-NEXT: leaq {{.*}}(%rip), %rcx
; ALL-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; ALL-NEXT: LBB3_2: ## %return
; ALL-NEXT: retq
entry:
%cmp = fcmp oeq float %p, 0.000000e+00
diff --git a/llvm/test/CodeGen/X86/bt.ll b/llvm/test/CodeGen/X86/bt.ll
index 6576f33a5b9..0279928069b 100644
--- a/llvm/test/CodeGen/X86/bt.ll
+++ b/llvm/test/CodeGen/X86/bt.ll
@@ -49,7 +49,7 @@ entry:
%tmp29 = lshr i32 %x, %n
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 0
- br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock, !prof !1
bb:
call void @foo()
@@ -89,7 +89,7 @@ entry:
%tmp29 = ashr i32 %x, %n
%tmp3 = and i32 1, %tmp29
%tmp4 = icmp eq i32 %tmp3, 0
- br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock, !prof !1
bb:
call void @foo()
@@ -109,7 +109,7 @@ entry:
%tmp29 = shl i32 1, %n
%tmp3 = and i32 %tmp29, %x
%tmp4 = icmp eq i32 %tmp3, 0
- br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock, !prof !1
bb:
call void @foo()
@@ -129,7 +129,7 @@ entry:
%tmp29 = shl i32 1, %n
%tmp3 = and i32 %x, %tmp29
%tmp4 = icmp eq i32 %tmp3, 0
- br i1 %tmp4, label %bb, label %UnifiedReturnBlock
+ br i1 %tmp4, label %bb, label %UnifiedReturnBlock, !prof !1
bb:
call void @foo()
@@ -608,3 +608,5 @@ entry:
%tobool = icmp ne i64 %and1, 0
ret i1 %tobool
}
+
+!1 = !{!"branch_weights", i32 2, i32 1}
diff --git a/llvm/test/CodeGen/X86/critical-edge-split-2.ll b/llvm/test/CodeGen/X86/critical-edge-split-2.ll
index d5878bd1a74..b4a808af66e 100644
--- a/llvm/test/CodeGen/X86/critical-edge-split-2.ll
+++ b/llvm/test/CodeGen/X86/critical-edge-split-2.ll
@@ -24,6 +24,7 @@ cond.end.i: ; preds = %entry
; CHECK-LABEL: test1:
; CHECK: testb %dil, %dil
-; CHECK: jne LBB0_2
+; CHECK: je LBB0_1
+; CHECK: retq
+; CHECK: LBB0_1:
; CHECK: divl
-; CHECK: LBB0_2:
diff --git a/llvm/test/CodeGen/X86/fp-une-cmp.ll b/llvm/test/CodeGen/X86/fp-une-cmp.ll
index e3b2a04060b..1b5af5aba36 100644
--- a/llvm/test/CodeGen/X86/fp-une-cmp.ll
+++ b/llvm/test/CodeGen/X86/fp-une-cmp.ll
@@ -36,8 +36,8 @@ define double @rdar_7859988(double %x, double %y) nounwind readnone optsize ssp
entry:
%mul = fmul double %x, %y
- %cmp = fcmp une double %mul, 0.000000e+00
- br i1 %cmp, label %bb2, label %bb1
+ %cmp = fcmp oeq double %mul, 0.000000e+00
+ br i1 %cmp, label %bb1, label %bb2
bb1:
%add = fadd double %mul, -1.000000e+00
diff --git a/llvm/test/CodeGen/X86/jump_sign.ll b/llvm/test/CodeGen/X86/jump_sign.ll
index ca3e8bf71eb..5d6baad7068 100644
--- a/llvm/test/CodeGen/X86/jump_sign.ll
+++ b/llvm/test/CodeGen/X86/jump_sign.ll
@@ -6,7 +6,7 @@ entry:
; CHECK: jns
%tmp1 = add i32 %X, 1 ; <i32> [#uses=1]
%tmp = icmp slt i32 %tmp1, 0 ; <i1> [#uses=1]
- br i1 %tmp, label %cond_true, label %cond_next
+ br i1 %tmp, label %cond_true, label %cond_next, !prof !1
cond_true: ; preds = %entry
%tmp2 = tail call i32 (...) @bar( ) ; <i32> [#uses=0]
@@ -303,3 +303,5 @@ if.then:
if.end:
ret i32 undef
}
+
+!1 = !{!"branch_weights", i32 2, i32 1}
diff --git a/llvm/test/CodeGen/X86/machine-cse.ll b/llvm/test/CodeGen/X86/machine-cse.ll
index 9853a7cde67..b6f3b454a5a 100644
--- a/llvm/test/CodeGen/X86/machine-cse.ll
+++ b/llvm/test/CodeGen/X86/machine-cse.ll
@@ -86,8 +86,8 @@ entry:
; CHECK-LABEL: cross_mbb_phys_cse:
; CHECK: cmpl
; CHECK: ja
- %cmp = icmp ugt i32 %a, %b
- br i1 %cmp, label %return, label %if.end
+ %cmp = icmp ule i32 %a, %b
+ br i1 %cmp, label %if.end, label %return
if.end: ; preds = %entry
; CHECK-NOT: cmpl
diff --git a/llvm/test/CodeGen/X86/shift-double.ll b/llvm/test/CodeGen/X86/shift-double.ll
index 8594c071329..f0bef7ae2f3 100644
--- a/llvm/test/CodeGen/X86/shift-double.ll
+++ b/llvm/test/CodeGen/X86/shift-double.ll
@@ -14,11 +14,13 @@ define i64 @test1(i64 %X, i8 %C) nounwind {
; CHECK-NEXT: shll %cl, %eax
; CHECK-NEXT: shldl %cl, %esi, %edx
; CHECK-NEXT: testb $32, %cl
-; CHECK-NEXT: je .LBB0_2
-; CHECK-NEXT: # BB#1:
+; CHECK-NEXT: jne .LBB0_1
+; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: popl %esi
+; CHECK-NEXT: retl
+; CHECK-NEXT: .LBB0_1:
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: .LBB0_2:
; CHECK-NEXT: popl %esi
; CHECK-NEXT: retl
%shift.upgrd.1 = zext i8 %C to i64 ; <i64> [#uses=1]
@@ -37,12 +39,14 @@ define i64 @test2(i64 %X, i8 %C) nounwind {
; CHECK-NEXT: sarl %cl, %edx
; CHECK-NEXT: shrdl %cl, %esi, %eax
; CHECK-NEXT: testb $32, %cl
-; CHECK-NEXT: je .LBB1_2
-; CHECK-NEXT: # BB#1:
+; CHECK-NEXT: jne .LBB1_1
+; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: popl %esi
+; CHECK-NEXT: retl
+; CHECK-NEXT: .LBB1_1:
; CHECK-NEXT: sarl $31, %esi
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: movl %esi, %edx
-; CHECK-NEXT: .LBB1_2:
; CHECK-NEXT: popl %esi
; CHECK-NEXT: retl
%shift.upgrd.2 = zext i8 %C to i64 ; <i64> [#uses=1]
@@ -61,11 +65,13 @@ define i64 @test3(i64 %X, i8 %C) nounwind {
; CHECK-NEXT: shrl %cl, %edx
; CHECK-NEXT: shrdl %cl, %esi, %eax
; CHECK-NEXT: testb $32, %cl
-; CHECK-NEXT: je .LBB2_2
-; CHECK-NEXT: # BB#1:
+; CHECK-NEXT: jne .LBB2_1
+; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: popl %esi
+; CHECK-NEXT: retl
+; CHECK-NEXT: .LBB2_1:
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: xorl %edx, %edx
-; CHECK-NEXT: .LBB2_2:
; CHECK-NEXT: popl %esi
; CHECK-NEXT: retl
%shift.upgrd.3 = zext i8 %C to i64 ; <i64> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/sink-hoist.ll b/llvm/test/CodeGen/X86/sink-hoist.ll
index 972fbdf48cb..f5d470912a1 100644
--- a/llvm/test/CodeGen/X86/sink-hoist.ll
+++ b/llvm/test/CodeGen/X86/sink-hoist.ll
@@ -26,7 +26,8 @@ define double @foo(double %x, double %y, i1 %c) nounwind {
; CHECK-LABEL: split:
; CHECK-NEXT: testb $1, %dil
-; CHECK-NEXT: je
+; CHECK-NEXT: jne
+; CHECK: ret
; CHECK: divsd
; CHECK: movapd
; CHECK: ret
diff --git a/llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll b/llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
index f711dc61574..75212f17ab3 100644
--- a/llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
+++ b/llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
@@ -1110,10 +1110,12 @@ define <4 x float> @add_ss_mask(<4 x float> %a, <4 x float> %b, <4 x float> %c,
; AVX1-LABEL: add_ss_mask:
; AVX1: # BB#0:
; AVX1-NEXT: testb $1, %dil
-; AVX1-NEXT: je .LBB62_2
-; AVX1-NEXT: # BB#1:
+; AVX1-NEXT: jne .LBB62_1
+; AVX1-NEXT: # BB#2:
+; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]
+; AVX1-NEXT: retq
+; AVX1-NEXT: .LBB62_1:
; AVX1-NEXT: vaddss %xmm1, %xmm0, %xmm2
-; AVX1-NEXT: .LBB62_2:
; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]
; AVX1-NEXT: retq
;
@@ -1165,10 +1167,12 @@ define <2 x double> @add_sd_mask(<2 x double> %a, <2 x double> %b, <2 x double>
; AVX1-LABEL: add_sd_mask:
; AVX1: # BB#0:
; AVX1-NEXT: testb $1, %dil
-; AVX1-NEXT: je .LBB63_2
-; AVX1-NEXT: # BB#1:
+; AVX1-NEXT: jne .LBB63_1
+; AVX1-NEXT: # BB#2:
+; AVX1-NEXT: vblendpd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
+; AVX1-NEXT: retq
+; AVX1-NEXT: .LBB63_1:
; AVX1-NEXT: vaddsd %xmm1, %xmm0, %xmm2
-; AVX1-NEXT: .LBB63_2:
; AVX1-NEXT: vblendpd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
; AVX1-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/testb-je-fusion.ll b/llvm/test/CodeGen/X86/testb-je-fusion.ll
index 9e946ae4ca3..7df4183ba08 100644
--- a/llvm/test/CodeGen/X86/testb-je-fusion.ll
+++ b/llvm/test/CodeGen/X86/testb-je-fusion.ll
@@ -9,7 +9,7 @@ define i32 @check_flag(i32 %flags, ...) nounwind {
entry:
%and = and i32 %flags, 512
%tobool = icmp eq i32 %and, 0
- br i1 %tobool, label %if.end, label %if.then
+ br i1 %tobool, label %if.end, label %if.then, !prof !1
if.then:
br label %if.end
@@ -18,3 +18,4 @@ if.end:
%hasflag = phi i32 [ 1, %if.then ], [ 0, %entry ]
ret i32 %hasflag
}
+!1 = !{!"branch_weights", i32 1, i32 2}
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