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Diffstat (limited to 'llvm/test/CodeGen/X86/vector-shuffle-variable-128.ll')
-rw-r--r--llvm/test/CodeGen/X86/vector-shuffle-variable-128.ll68
1 files changed, 34 insertions, 34 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-variable-128.ll b/llvm/test/CodeGen/X86/vector-shuffle-variable-128.ll
index c0a58640b56..6a0474803c6 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-variable-128.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-variable-128.ll
@@ -11,7 +11,7 @@
define <2 x double> @var_shuffle_v2f64_v2f64_xx_i64(<2 x double> %x, i64 %i0, i64 %i1) nounwind {
; SSE-LABEL: var_shuffle_v2f64_v2f64_xx_i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: andl $1, %esi
; SSE-NEXT: andl $1, %edi
; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
@@ -20,7 +20,7 @@ define <2 x double> @var_shuffle_v2f64_v2f64_xx_i64(<2 x double> %x, i64 %i0, i6
; SSE-NEXT: retq
;
; AVX-LABEL: var_shuffle_v2f64_v2f64_xx_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: andl $1, %esi
; AVX-NEXT: andl $1, %edi
; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
@@ -36,7 +36,7 @@ define <2 x double> @var_shuffle_v2f64_v2f64_xx_i64(<2 x double> %x, i64 %i0, i6
define <2 x i64> @var_shuffle_v2i64_v2i64_xx_i64(<2 x i64> %x, i32 %i0, i32 %i1) nounwind {
; SSE-LABEL: var_shuffle_v2i64_v2i64_xx_i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; SSE-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE-NEXT: andl $1, %edi
@@ -48,7 +48,7 @@ define <2 x i64> @var_shuffle_v2i64_v2i64_xx_i64(<2 x i64> %x, i32 %i0, i32 %i1)
; SSE-NEXT: retq
;
; AVX-LABEL: var_shuffle_v2i64_v2i64_xx_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX-NEXT: andl $1, %edi
@@ -67,7 +67,7 @@ define <2 x i64> @var_shuffle_v2i64_v2i64_xx_i64(<2 x i64> %x, i32 %i0, i32 %i1)
define <4 x float> @var_shuffle_v4f32_v4f32_xxxx_i32(<4 x float> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3) nounwind {
; SSE2-LABEL: var_shuffle_v4f32_v4f32_xxxx_i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SSE2-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; SSE2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
@@ -87,7 +87,7 @@ define <4 x float> @var_shuffle_v4f32_v4f32_xxxx_i32(<4 x float> %x, i32 %i0, i3
; SSE2-NEXT: retq
;
; SSSE3-LABEL: var_shuffle_v4f32_v4f32_xxxx_i32:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SSSE3-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; SSSE3-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
@@ -107,7 +107,7 @@ define <4 x float> @var_shuffle_v4f32_v4f32_xxxx_i32(<4 x float> %x, i32 %i0, i3
; SSSE3-NEXT: retq
;
; SSE41-LABEL: var_shuffle_v4f32_v4f32_xxxx_i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SSE41-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; SSE41-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
@@ -124,7 +124,7 @@ define <4 x float> @var_shuffle_v4f32_v4f32_xxxx_i32(<4 x float> %x, i32 %i0, i3
; SSE41-NEXT: retq
;
; AVX-LABEL: var_shuffle_v4f32_v4f32_xxxx_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; AVX-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; AVX-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
@@ -152,7 +152,7 @@ define <4 x float> @var_shuffle_v4f32_v4f32_xxxx_i32(<4 x float> %x, i32 %i0, i3
define <4 x i32> @var_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3) nounwind {
; SSE2-LABEL: var_shuffle_v4i32_v4i32_xxxx_i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SSE2-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; SSE2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
@@ -172,7 +172,7 @@ define <4 x i32> @var_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32 %i0, i32 %i
; SSE2-NEXT: retq
;
; SSSE3-LABEL: var_shuffle_v4i32_v4i32_xxxx_i32:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SSSE3-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; SSSE3-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
@@ -192,7 +192,7 @@ define <4 x i32> @var_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32 %i0, i32 %i
; SSSE3-NEXT: retq
;
; SSE41-LABEL: var_shuffle_v4i32_v4i32_xxxx_i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SSE41-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; SSE41-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
@@ -209,7 +209,7 @@ define <4 x i32> @var_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32 %i0, i32 %i
; SSE41-NEXT: retq
;
; AVX-LABEL: var_shuffle_v4i32_v4i32_xxxx_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; AVX-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; AVX-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
@@ -237,7 +237,7 @@ define <4 x i32> @var_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32 %i0, i32 %i
define <8 x i16> @var_shuffle_v8i16_v8i16_xxxxxxxx_i16(<8 x i16> %x, i16 %i0, i16 %i1, i16 %i2, i16 %i3, i16 %i4, i16 %i5, i16 %i6, i16 %i7) nounwind {
; SSE2-LABEL: var_shuffle_v8i16_v8i16_xxxxxxxx_i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; SSE2-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -281,7 +281,7 @@ define <8 x i16> @var_shuffle_v8i16_v8i16_xxxxxxxx_i16(<8 x i16> %x, i16 %i0, i1
; SSE2-NEXT: retq
;
; SSSE3-LABEL: var_shuffle_v8i16_v8i16_xxxxxxxx_i16:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; SSSE3-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -325,7 +325,7 @@ define <8 x i16> @var_shuffle_v8i16_v8i16_xxxxxxxx_i16(<8 x i16> %x, i16 %i0, i1
; SSSE3-NEXT: retq
;
; SSE41-LABEL: var_shuffle_v8i16_v8i16_xxxxxxxx_i16:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; SSE41-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -355,7 +355,7 @@ define <8 x i16> @var_shuffle_v8i16_v8i16_xxxxxxxx_i16(<8 x i16> %x, i16 %i0, i1
; SSE41-NEXT: retq
;
; AVX-LABEL: var_shuffle_v8i16_v8i16_xxxxxxxx_i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; AVX-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -404,7 +404,7 @@ define <8 x i16> @var_shuffle_v8i16_v8i16_xxxxxxxx_i16(<8 x i16> %x, i16 %i0, i1
define <16 x i8> @var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8 %i0, i8 %i1, i8 %i2, i8 %i3, i8 %i4, i8 %i5, i8 %i6, i8 %i7, i8 %i8, i8 %i9, i8 %i10, i8 %i11, i8 %i12, i8 %i13, i8 %i14, i8 %i15) nounwind {
; SSE2-LABEL: var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; SSE2-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -489,7 +489,7 @@ define <16 x i8> @var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8 %
; SSE2-NEXT: retq
;
; SSSE3-LABEL: var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; SSSE3-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -574,7 +574,7 @@ define <16 x i8> @var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8 %
; SSSE3-NEXT: retq
;
; SSE41-LABEL: var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; SSE41-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -629,7 +629,7 @@ define <16 x i8> @var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8 %
; SSE41-NEXT: retq
;
; AVX-LABEL: var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; AVX-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -723,7 +723,7 @@ define <16 x i8> @var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8 %
define <4 x i32> @mem_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32* %i) nounwind {
; SSE2-LABEL: mem_shuffle_v4i32_v4i32_xxxx_i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movl (%rdi), %eax
; SSE2-NEXT: movl 4(%rdi), %ecx
; SSE2-NEXT: andl $3, %eax
@@ -743,7 +743,7 @@ define <4 x i32> @mem_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32* %i) nounwi
; SSE2-NEXT: retq
;
; SSSE3-LABEL: mem_shuffle_v4i32_v4i32_xxxx_i32:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: movl (%rdi), %eax
; SSSE3-NEXT: movl 4(%rdi), %ecx
; SSSE3-NEXT: andl $3, %eax
@@ -763,7 +763,7 @@ define <4 x i32> @mem_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32* %i) nounwi
; SSSE3-NEXT: retq
;
; SSE41-LABEL: mem_shuffle_v4i32_v4i32_xxxx_i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movl (%rdi), %eax
; SSE41-NEXT: movl 4(%rdi), %ecx
; SSE41-NEXT: andl $3, %eax
@@ -780,7 +780,7 @@ define <4 x i32> @mem_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32* %i) nounwi
; SSE41-NEXT: retq
;
; AVX-LABEL: mem_shuffle_v4i32_v4i32_xxxx_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: movl (%rdi), %eax
; AVX-NEXT: movl 4(%rdi), %ecx
; AVX-NEXT: andl $3, %eax
@@ -816,7 +816,7 @@ define <4 x i32> @mem_shuffle_v4i32_v4i32_xxxx_i32(<4 x i32> %x, i32* %i) nounwi
define <16 x i8> @mem_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8* %i) nounwind {
; SSE2-LABEL: mem_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movzbl (%rdi), %eax
; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movzbl 15(%rdi), %edx
@@ -901,7 +901,7 @@ define <16 x i8> @mem_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8*
; SSE2-NEXT: retq
;
; SSSE3-LABEL: mem_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: movzbl (%rdi), %eax
; SSSE3-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSSE3-NEXT: movzbl 15(%rdi), %edx
@@ -986,7 +986,7 @@ define <16 x i8> @mem_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8*
; SSSE3-NEXT: retq
;
; SSE41-LABEL: mem_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movzbl (%rdi), %eax
; SSE41-NEXT: andl $15, %eax
; SSE41-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
@@ -1041,7 +1041,7 @@ define <16 x i8> @mem_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8*
; SSE41-NEXT: retq
;
; AVX-LABEL: mem_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: movzbl (%rdi), %eax
; AVX-NEXT: andl $15, %eax
; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
@@ -1167,7 +1167,7 @@ define <16 x i8> @mem_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8(<16 x i8> %x, i8*
define <4 x float> @var_shuffle_v4f32_v4f32_x0yx_i32(<4 x float> %x, <4 x float> %y, i32 %i0, i32 %i1, i32 %i2, i32 %i3) nounwind {
; SSE-LABEL: var_shuffle_v4f32_v4f32_x0yx_i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; SSE-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; SSE-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
@@ -1184,7 +1184,7 @@ define <4 x float> @var_shuffle_v4f32_v4f32_x0yx_i32(<4 x float> %x, <4 x float>
; SSE-NEXT: retq
;
; AVX-LABEL: var_shuffle_v4f32_v4f32_x0yx_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; AVX-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; AVX-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
@@ -1212,7 +1212,7 @@ define <4 x float> @var_shuffle_v4f32_v4f32_x0yx_i32(<4 x float> %x, <4 x float>
define <8 x i16> @var_shuffle_v8i16_v8i16_xyxyxy00_i16(<8 x i16> %x, <8 x i16> %y, i16 %i0, i16 %i1, i16 %i2, i16 %i3, i16 %i4, i16 %i5, i16 %i6, i16 %i7) nounwind {
; SSE2-LABEL: var_shuffle_v8i16_v8i16_xyxyxy00_i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; SSE2-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; SSE2-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -1249,7 +1249,7 @@ define <8 x i16> @var_shuffle_v8i16_v8i16_xyxyxy00_i16(<8 x i16> %x, <8 x i16> %
; SSE2-NEXT: retq
;
; SSSE3-LABEL: var_shuffle_v8i16_v8i16_xyxyxy00_i16:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; SSSE3-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; SSSE3-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -1286,7 +1286,7 @@ define <8 x i16> @var_shuffle_v8i16_v8i16_xyxyxy00_i16(<8 x i16> %x, <8 x i16> %
; SSSE3-NEXT: retq
;
; SSE41-LABEL: var_shuffle_v8i16_v8i16_xyxyxy00_i16:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; SSE41-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; SSE41-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
@@ -1311,7 +1311,7 @@ define <8 x i16> @var_shuffle_v8i16_v8i16_xyxyxy00_i16(<8 x i16> %x, <8 x i16> %
; SSE41-NEXT: retq
;
; AVX-LABEL: var_shuffle_v8i16_v8i16_xyxyxy00_i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: # kill: %r9d<def> %r9d<kill> %r9<def>
; AVX-NEXT: # kill: %r8d<def> %r8d<kill> %r8<def>
; AVX-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
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