diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 528 |
1 files changed, 264 insertions, 264 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll index e4234c05845..44d0217f529 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll @@ -5,13 +5,13 @@ define <8 x float> @shuffle_v8f32_00000000(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_00000000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_00000000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vbroadcastss %xmm0, %ymm0 ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> @@ -20,14 +20,14 @@ define <8 x float> @shuffle_v8f32_00000000(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00000010(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_00000010: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_00000010: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,0] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,0,1] ; AVX2OR512VL-NEXT: retq @@ -37,14 +37,14 @@ define <8 x float> @shuffle_v8f32_00000010(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00000200(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_00000200: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,0,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_00000200: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,2] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,1,0] ; AVX2OR512VL-NEXT: retq @@ -54,14 +54,14 @@ define <8 x float> @shuffle_v8f32_00000200(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00003000(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_00003000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,0,0,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_00003000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,3,0] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,1,0] ; AVX2OR512VL-NEXT: retq @@ -71,7 +71,7 @@ define <8 x float> @shuffle_v8f32_00003000(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00040000(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_00040000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,3] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4] @@ -79,7 +79,7 @@ define <8 x float> @shuffle_v8f32_00040000(<8 x float> %a, <8 x float> %b) { ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_00040000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,0,4,0,0,0,0] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -89,14 +89,14 @@ define <8 x float> @shuffle_v8f32_00040000(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00500000(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_00500000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1] ; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,1,0,4,4,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_00500000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,5,0,0,0,0,0] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -106,14 +106,14 @@ define <8 x float> @shuffle_v8f32_00500000(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_06000000(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_06000000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1] ; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,0,0,4,4,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_06000000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,6,0,0,0,0,0,0] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -123,14 +123,14 @@ define <8 x float> @shuffle_v8f32_06000000(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_70000000(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_70000000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1] ; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,0,0,0,4,4,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_70000000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: movl $7, %eax ; AVX2OR512VL-NEXT: vmovd %eax, %xmm1 ; AVX2OR512VL-NEXT: vpermd %ymm0, %ymm1, %ymm0 @@ -141,7 +141,7 @@ define <8 x float> @shuffle_v8f32_70000000(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_01014545(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_01014545: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5> @@ -150,14 +150,14 @@ define <8 x float> @shuffle_v8f32_01014545(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00112233(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_00112233: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,1,1] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_00112233: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,1,1,2,2,3,3] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -167,14 +167,14 @@ define <8 x float> @shuffle_v8f32_00112233(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00001111(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_00001111: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_00001111: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,1,1] ; AVX2OR512VL-NEXT: retq @@ -184,7 +184,7 @@ define <8 x float> @shuffle_v8f32_00001111(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_81a3c5e7(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_81a3c5e7: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> @@ -193,14 +193,14 @@ define <8 x float> @shuffle_v8f32_81a3c5e7(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_08080808(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_08080808: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,1,3] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_08080808: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero ; AVX2OR512VL-NEXT: vbroadcastsd %xmm0, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -210,7 +210,7 @@ define <8 x float> @shuffle_v8f32_08080808(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_08084c4c(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_08084c4c: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0],ymm1[0,0],ymm0[4,4],ymm1[4,4] ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7] ; ALL-NEXT: retq @@ -220,7 +220,7 @@ define <8 x float> @shuffle_v8f32_08084c4c(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_8823cc67(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_8823cc67: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,0],ymm0[2,3],ymm1[4,4],ymm0[6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 8, i32 2, i32 3, i32 12, i32 12, i32 6, i32 7> @@ -229,7 +229,7 @@ define <8 x float> @shuffle_v8f32_8823cc67(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_9832dc76(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_9832dc76: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vshufps {{.*#+}} ymm0 = ymm1[1,0],ymm0[3,2],ymm1[5,4],ymm0[7,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 9, i32 8, i32 3, i32 2, i32 13, i32 12, i32 7, i32 6> @@ -238,7 +238,7 @@ define <8 x float> @shuffle_v8f32_9832dc76(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_9810dc54(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_9810dc54: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vshufps {{.*#+}} ymm0 = ymm1[1,0],ymm0[1,0],ymm1[5,4],ymm0[5,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 9, i32 8, i32 1, i32 0, i32 13, i32 12, i32 5, i32 4> @@ -247,7 +247,7 @@ define <8 x float> @shuffle_v8f32_9810dc54(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_08194c5d(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_08194c5d: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vunpcklps {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13> @@ -256,7 +256,7 @@ define <8 x float> @shuffle_v8f32_08194c5d(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_2a3b6e7f(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_2a3b6e7f: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15> @@ -265,14 +265,14 @@ define <8 x float> @shuffle_v8f32_2a3b6e7f(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_08192a3b(<8 x float> %a, <8 x float> %b) { ; AVX1OR2-LABEL: shuffle_v8f32_08192a3b: -; AVX1OR2: # BB#0: +; AVX1OR2: # %bb.0: ; AVX1OR2-NEXT: vunpckhps {{.*#+}} xmm2 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] ; AVX1OR2-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; AVX1OR2-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 ; AVX1OR2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8f32_08192a3b: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vmovaps {{.*#+}} ymm2 = [0,8,1,9,2,10,3,11] ; AVX512VL-NEXT: vpermt2ps %ymm1, %ymm2, %ymm0 ; AVX512VL-NEXT: retq @@ -282,7 +282,7 @@ define <8 x float> @shuffle_v8f32_08192a3b(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_08991abb(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_08991abb: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vshufps {{.*#+}} xmm2 = xmm0[0,0],xmm1[0,0] ; AVX1-NEXT: vshufps {{.*#+}} xmm2 = xmm2[0,2],xmm1[1,1] ; AVX1-NEXT: vblendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1] @@ -291,7 +291,7 @@ define <8 x float> @shuffle_v8f32_08991abb(<8 x float> %a, <8 x float> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8f32_08991abb: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <u,0,1,1,u,2,3,3> ; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,3] @@ -300,7 +300,7 @@ define <8 x float> @shuffle_v8f32_08991abb(<8 x float> %a, <8 x float> %b) { ; AVX2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8f32_08991abb: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vpermilps {{.*#+}} xmm2 = xmm0[0,1,1,3] ; AVX512VL-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,1,1,10,2,3,3] ; AVX512VL-NEXT: vpermi2ps %ymm2, %ymm1, %ymm0 @@ -311,7 +311,7 @@ define <8 x float> @shuffle_v8f32_08991abb(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_091b2d3f(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_091b2d3f: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm2 = xmm0[0,1,1,3] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,1,3,3] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 @@ -319,14 +319,14 @@ define <8 x float> @shuffle_v8f32_091b2d3f(<8 x float> %a, <8 x float> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8f32_091b2d3f: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <0,u,1,u,2,u,3,u> ; AVX2-NEXT: vpermps %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] ; AVX2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8f32_091b2d3f: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vmovaps {{.*#+}} ymm2 = [0,9,1,11,2,13,3,15] ; AVX512VL-NEXT: vpermt2ps %ymm1, %ymm2, %ymm0 ; AVX512VL-NEXT: retq @@ -336,14 +336,14 @@ define <8 x float> @shuffle_v8f32_091b2d3f(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_09ab1def(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_09ab1def: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3] ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 ; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_09ab1def: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,3] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,1,3] ; AVX2OR512VL-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] @@ -354,7 +354,7 @@ define <8 x float> @shuffle_v8f32_09ab1def(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00014445(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_00014445: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,1,4,4,4,5] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 1, i32 4, i32 4, i32 4, i32 5> @@ -363,7 +363,7 @@ define <8 x float> @shuffle_v8f32_00014445(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00204464(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_00204464: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,0,4,4,6,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 0, i32 4, i32 4, i32 6, i32 4> @@ -372,7 +372,7 @@ define <8 x float> @shuffle_v8f32_00204464(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_03004744(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_03004744: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,3,0,0,4,7,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 3, i32 0, i32 0, i32 4, i32 7, i32 4, i32 4> @@ -381,7 +381,7 @@ define <8 x float> @shuffle_v8f32_03004744(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_10005444(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_10005444: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,0,0,5,4,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4> @@ -390,7 +390,7 @@ define <8 x float> @shuffle_v8f32_10005444(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_22006644(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_22006644: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[2,2,0,0,6,6,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 2, i32 2, i32 0, i32 0, i32 6, i32 6, i32 4, i32 4> @@ -399,7 +399,7 @@ define <8 x float> @shuffle_v8f32_22006644(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_33307774(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_33307774: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,3,3,0,7,7,7,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 3, i32 3, i32 3, i32 0, i32 7, i32 7, i32 7, i32 4> @@ -408,7 +408,7 @@ define <8 x float> @shuffle_v8f32_33307774(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_32107654(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_32107654: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4> @@ -417,7 +417,7 @@ define <8 x float> @shuffle_v8f32_32107654(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00234467(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_00234467: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,3,4,4,6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 3, i32 4, i32 4, i32 6, i32 7> @@ -426,7 +426,7 @@ define <8 x float> @shuffle_v8f32_00234467(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00224466(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_00224466: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6> @@ -435,7 +435,7 @@ define <8 x float> @shuffle_v8f32_00224466(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_10325476(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_10325476: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,5,4,7,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6> @@ -444,7 +444,7 @@ define <8 x float> @shuffle_v8f32_10325476(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_11335577(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_11335577: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7> @@ -453,7 +453,7 @@ define <8 x float> @shuffle_v8f32_11335577(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_10235467(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_10235467: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,2,3,5,4,6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 0, i32 2, i32 3, i32 5, i32 4, i32 6, i32 7> @@ -462,7 +462,7 @@ define <8 x float> @shuffle_v8f32_10235467(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_10225466(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_10225466: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,2,2,5,4,6,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 0, i32 2, i32 2, i32 5, i32 4, i32 6, i32 6> @@ -471,7 +471,7 @@ define <8 x float> @shuffle_v8f32_10225466(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00015444(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_00015444: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,1,5,4,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 1, i32 5, i32 4, i32 4, i32 4> @@ -480,7 +480,7 @@ define <8 x float> @shuffle_v8f32_00015444(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00204644(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_00204644: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,0,4,6,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 0, i32 4, i32 6, i32 4, i32 4> @@ -489,7 +489,7 @@ define <8 x float> @shuffle_v8f32_00204644(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_03004474(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_03004474: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,3,0,0,4,4,7,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 3, i32 0, i32 0, i32 4, i32 4, i32 7, i32 4> @@ -498,7 +498,7 @@ define <8 x float> @shuffle_v8f32_03004474(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_10004444(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_10004444: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,0,0,4,4,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4> @@ -507,7 +507,7 @@ define <8 x float> @shuffle_v8f32_10004444(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_22006446(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_22006446: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[2,2,0,0,6,4,4,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 2, i32 2, i32 0, i32 0, i32 6, i32 4, i32 4, i32 6> @@ -516,7 +516,7 @@ define <8 x float> @shuffle_v8f32_22006446(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_33307474(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_33307474: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,3,3,0,7,4,7,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 3, i32 3, i32 3, i32 0, i32 7, i32 4, i32 7, i32 4> @@ -525,7 +525,7 @@ define <8 x float> @shuffle_v8f32_33307474(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_32104567(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_32104567: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,4,5,6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 4, i32 5, i32 6, i32 7> @@ -534,7 +534,7 @@ define <8 x float> @shuffle_v8f32_32104567(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00236744(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_00236744: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,3,6,7,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 3, i32 6, i32 7, i32 4, i32 4> @@ -543,7 +543,7 @@ define <8 x float> @shuffle_v8f32_00236744(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00226644(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_00226644: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,2,6,6,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 6, i32 6, i32 4, i32 4> @@ -552,7 +552,7 @@ define <8 x float> @shuffle_v8f32_00226644(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_10324567(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_10324567: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,4,5,6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7> @@ -561,7 +561,7 @@ define <8 x float> @shuffle_v8f32_10324567(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_11334567(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_11334567: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,1,3,3,4,5,6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 4, i32 5, i32 6, i32 7> @@ -570,7 +570,7 @@ define <8 x float> @shuffle_v8f32_11334567(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_01235467(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_01235467: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,1,2,3,5,4,6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 6, i32 7> @@ -579,7 +579,7 @@ define <8 x float> @shuffle_v8f32_01235467(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_01235466(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_01235466: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,1,2,3,5,4,6,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 6, i32 6> @@ -588,7 +588,7 @@ define <8 x float> @shuffle_v8f32_01235466(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_002u6u44(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_002u6u44: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,u,6,u,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 undef, i32 6, i32 undef, i32 4, i32 4> @@ -597,7 +597,7 @@ define <8 x float> @shuffle_v8f32_002u6u44(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_00uu66uu(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_00uu66uu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,u,u,6,6,u,u] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 undef, i32 undef, i32 6, i32 6, i32 undef, i32 undef> @@ -606,7 +606,7 @@ define <8 x float> @shuffle_v8f32_00uu66uu(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_103245uu(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_103245uu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,4,5,u,u] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 4, i32 5, i32 undef, i32 undef> @@ -615,7 +615,7 @@ define <8 x float> @shuffle_v8f32_103245uu(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_1133uu67(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_1133uu67: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,1,3,3,u,u,6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 undef, i32 undef, i32 6, i32 7> @@ -624,7 +624,7 @@ define <8 x float> @shuffle_v8f32_1133uu67(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_0uu354uu(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_0uu354uu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,u,u,3,5,4,u,u] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 undef, i32 undef, i32 3, i32 5, i32 4, i32 undef, i32 undef> @@ -633,7 +633,7 @@ define <8 x float> @shuffle_v8f32_0uu354uu(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_uuu3uu66(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_uuu3uu66: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[u,u,u,3,u,u,6,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 6, i32 6> @@ -642,7 +642,7 @@ define <8 x float> @shuffle_v8f32_uuu3uu66(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_c348cda0(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_c348cda0: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3,0,1] ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,3],ymm2[0,0],ymm0[4,7],ymm2[4,4] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm1[2,3,0,1] @@ -652,7 +652,7 @@ define <8 x float> @shuffle_v8f32_c348cda0(<8 x float> %a, <8 x float> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8f32_c348cda0: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <4,u,u,0,4,5,2,u> ; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1 ; AVX2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,3,2,0,4,7,6,4] @@ -661,7 +661,7 @@ define <8 x float> @shuffle_v8f32_c348cda0(<8 x float> %a, <8 x float> %b) { ; AVX2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8f32_c348cda0: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vmovaps {{.*#+}} ymm2 = [4,11,12,0,4,5,2,8] ; AVX512VL-NEXT: vpermi2ps %ymm0, %ymm1, %ymm2 ; AVX512VL-NEXT: vmovaps %ymm2, %ymm0 @@ -672,7 +672,7 @@ define <8 x float> @shuffle_v8f32_c348cda0(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_f511235a(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_f511235a: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm1 = ymm1[3,1,2,2,7,5,6,6] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm1[2,3,0,1] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3,0,1] @@ -682,7 +682,7 @@ define <8 x float> @shuffle_v8f32_f511235a(<8 x float> %a, <8 x float> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8f32_f511235a: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpermilps {{.*#+}} ymm1 = ymm1[3,2,2,3,7,6,6,7] ; AVX2-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[2,1,2,0] ; AVX2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,1,2,3,5,5,6,7] @@ -691,7 +691,7 @@ define <8 x float> @shuffle_v8f32_f511235a(<8 x float> %a, <8 x float> %b) { ; AVX2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8f32_f511235a: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vmovaps {{.*#+}} ymm2 = [15,5,1,1,2,3,5,10] ; AVX512VL-NEXT: vpermt2ps %ymm1, %ymm2, %ymm0 ; AVX512VL-NEXT: retq @@ -701,13 +701,13 @@ define <8 x float> @shuffle_v8f32_f511235a(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_32103210(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_32103210: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_32103210: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,0,1] ; AVX2OR512VL-NEXT: retq @@ -717,13 +717,13 @@ define <8 x float> @shuffle_v8f32_32103210(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_76547654(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_76547654: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_76547654: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,3,2,3] ; AVX2OR512VL-NEXT: retq @@ -733,13 +733,13 @@ define <8 x float> @shuffle_v8f32_76547654(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_76543210(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_76543210: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_76543210: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,3,0,1] ; AVX2OR512VL-NEXT: retq @@ -749,7 +749,7 @@ define <8 x float> @shuffle_v8f32_76543210(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_3210ba98(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_3210ba98: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; ALL-NEXT: retq @@ -759,7 +759,7 @@ define <8 x float> @shuffle_v8f32_3210ba98(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_3210fedc(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_3210fedc: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3] ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; ALL-NEXT: retq @@ -769,7 +769,7 @@ define <8 x float> @shuffle_v8f32_3210fedc(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_7654fedc(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_7654fedc: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3] ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; ALL-NEXT: retq @@ -779,7 +779,7 @@ define <8 x float> @shuffle_v8f32_7654fedc(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_fedc7654(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_fedc7654: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[2,3] ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; ALL-NEXT: retq @@ -789,7 +789,7 @@ define <8 x float> @shuffle_v8f32_fedc7654(<8 x float> %a, <8 x float> %b) { define <8 x float> @PR21138(<8 x float> %truc, <8 x float> %tchose) { ; AVX1-LABEL: PR21138: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,3],xmm2[1,3] ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1 @@ -799,7 +799,7 @@ define <8 x float> @PR21138(<8 x float> %truc, <8 x float> %tchose) { ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: PR21138: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm1[1,3],ymm0[5,7],ymm1[5,7] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,1,3] ; AVX2OR512VL-NEXT: retq @@ -809,7 +809,7 @@ define <8 x float> @PR21138(<8 x float> %truc, <8 x float> %tchose) { define <8 x float> @shuffle_v8f32_ba987654(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_ba987654: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3] ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; ALL-NEXT: retq @@ -819,7 +819,7 @@ define <8 x float> @shuffle_v8f32_ba987654(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_ba983210(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_ba983210: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; ALL-NEXT: retq @@ -829,7 +829,7 @@ define <8 x float> @shuffle_v8f32_ba983210(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_80u1c4u5(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_80u1c4u5: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vunpcklps {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[4],ymm0[4],ymm1[5],ymm0[5] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 0, i32 undef, i32 1, i32 12, i32 4, i32 undef, i32 5> @@ -838,7 +838,7 @@ define <8 x float> @shuffle_v8f32_80u1c4u5(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_a2u3e6f7(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_a2u3e6f7: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vunpckhps {{.*#+}} ymm0 = ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[6],ymm0[6],ymm1[7],ymm0[7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 10, i32 2, i32 undef, i32 3, i32 14, i32 6, i32 15, i32 7> @@ -847,7 +847,7 @@ define <8 x float> @shuffle_v8f32_a2u3e6f7(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_uuuu1111(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_uuuu1111: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1] ; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; ALL-NEXT: retq @@ -857,13 +857,13 @@ define <8 x float> @shuffle_v8f32_uuuu1111(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_44444444(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8f32_44444444: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8f32_44444444: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX2OR512VL-NEXT: vbroadcastss %xmm0, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -873,7 +873,7 @@ define <8 x float> @shuffle_v8f32_44444444(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_1188uuuu(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_1188uuuu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,1],xmm1[0,0] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 1, i32 8, i32 8, i32 undef, i32 undef, i32 undef, i32 undef> @@ -882,7 +882,7 @@ define <8 x float> @shuffle_v8f32_1188uuuu(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_uuuu3210(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_uuuu3210: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] ; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; ALL-NEXT: retq @@ -892,7 +892,7 @@ define <8 x float> @shuffle_v8f32_uuuu3210(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_uuuu1188(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_uuuu1188: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,1],xmm1[0,0] ; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; ALL-NEXT: retq @@ -902,7 +902,7 @@ define <8 x float> @shuffle_v8f32_uuuu1188(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_1111uuuu(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_1111uuuu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1] ; ALL-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef> @@ -911,7 +911,7 @@ define <8 x float> @shuffle_v8f32_1111uuuu(<8 x float> %a, <8 x float> %b) { define <8 x float> @shuffle_v8f32_5555uuuu(<8 x float> %a, <8 x float> %b) { ; ALL-LABEL: shuffle_v8f32_5555uuuu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vextractf128 $1, %ymm0, %xmm0 ; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1] ; ALL-NEXT: retq @@ -921,13 +921,13 @@ define <8 x float> @shuffle_v8f32_5555uuuu(<8 x float> %a, <8 x float> %b) { define <8 x i32> @shuffle_v8i32_00000000(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00000000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00000000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vbroadcastss %xmm0, %ymm0 ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> @@ -936,14 +936,14 @@ define <8 x i32> @shuffle_v8i32_00000000(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00000010(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00000010: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00000010: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,0] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,0,1] ; AVX2OR512VL-NEXT: retq @@ -953,14 +953,14 @@ define <8 x i32> @shuffle_v8i32_00000010(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00000200(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00000200: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,0,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00000200: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,2] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,1,0] ; AVX2OR512VL-NEXT: retq @@ -970,14 +970,14 @@ define <8 x i32> @shuffle_v8i32_00000200(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00003000(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00003000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,0,0,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00003000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,3,0] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,1,0] ; AVX2OR512VL-NEXT: retq @@ -987,7 +987,7 @@ define <8 x i32> @shuffle_v8i32_00003000(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00040000(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00040000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,3] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4] @@ -995,7 +995,7 @@ define <8 x i32> @shuffle_v8i32_00040000(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00040000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,0,4,0,0,0,0] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1005,14 +1005,14 @@ define <8 x i32> @shuffle_v8i32_00040000(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00500000(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00500000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1] ; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,1,0,4,4,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00500000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,5,0,0,0,0,0] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1022,14 +1022,14 @@ define <8 x i32> @shuffle_v8i32_00500000(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_06000000(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_06000000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1] ; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,0,0,4,4,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_06000000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,6,0,0,0,0,0,0] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1039,14 +1039,14 @@ define <8 x i32> @shuffle_v8i32_06000000(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_70000000(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_70000000: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1] ; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,0,0,0,4,4,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_70000000: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: movl $7, %eax ; AVX2OR512VL-NEXT: vmovd %eax, %xmm1 ; AVX2OR512VL-NEXT: vpermd %ymm0, %ymm1, %ymm0 @@ -1057,12 +1057,12 @@ define <8 x i32> @shuffle_v8i32_70000000(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_01014545(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_01014545: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_01014545: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,1,0,1,4,5,4,5] ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5> @@ -1071,14 +1071,14 @@ define <8 x i32> @shuffle_v8i32_01014545(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00112233(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00112233: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,1,1] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00112233: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,1,1,2,2,3,3] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1088,14 +1088,14 @@ define <8 x i32> @shuffle_v8i32_00112233(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00001111(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00001111: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00001111: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,1,1] ; AVX2OR512VL-NEXT: retq @@ -1105,7 +1105,7 @@ define <8 x i32> @shuffle_v8i32_00001111(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_81a3c5e7(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_81a3c5e7: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> @@ -1114,14 +1114,14 @@ define <8 x i32> @shuffle_v8i32_81a3c5e7(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_08080808(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_08080808: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,1,3] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_08080808: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; AVX2OR512VL-NEXT: vbroadcastsd %xmm0, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1131,13 +1131,13 @@ define <8 x i32> @shuffle_v8i32_08080808(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_08084c4c(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_08084c4c: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0],ymm1[0,0],ymm0[4,4],ymm1[4,4] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_08084c4c: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm1 = ymm1[0,0,2,0,4,4,6,4] ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,1,0,1,4,5,4,5] ; AVX2OR512VL-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] @@ -1148,7 +1148,7 @@ define <8 x i32> @shuffle_v8i32_08084c4c(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_8823cc67(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_8823cc67: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,0],ymm0[2,3],ymm1[4,4],ymm0[6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 8, i32 2, i32 3, i32 12, i32 12, i32 6, i32 7> @@ -1157,7 +1157,7 @@ define <8 x i32> @shuffle_v8i32_8823cc67(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_9832dc76(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_9832dc76: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vshufps {{.*#+}} ymm0 = ymm1[1,0],ymm0[3,2],ymm1[5,4],ymm0[7,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 9, i32 8, i32 3, i32 2, i32 13, i32 12, i32 7, i32 6> @@ -1166,7 +1166,7 @@ define <8 x i32> @shuffle_v8i32_9832dc76(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_9810dc54(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_9810dc54: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vshufps {{.*#+}} ymm0 = ymm1[1,0],ymm0[1,0],ymm1[5,4],ymm0[5,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 9, i32 8, i32 1, i32 0, i32 13, i32 12, i32 5, i32 4> @@ -1175,7 +1175,7 @@ define <8 x i32> @shuffle_v8i32_9810dc54(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_08194c5d(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_08194c5d: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vunpcklps {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13> @@ -1184,7 +1184,7 @@ define <8 x i32> @shuffle_v8i32_08194c5d(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_2a3b6e7f(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_2a3b6e7f: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15> @@ -1193,14 +1193,14 @@ define <8 x i32> @shuffle_v8i32_2a3b6e7f(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_08192a3b(<8 x i32> %a, <8 x i32> %b) { ; AVX1OR2-LABEL: shuffle_v8i32_08192a3b: -; AVX1OR2: # BB#0: +; AVX1OR2: # %bb.0: ; AVX1OR2-NEXT: vunpckhps {{.*#+}} xmm2 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] ; AVX1OR2-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; AVX1OR2-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 ; AVX1OR2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8i32_08192a3b: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm0 = [0,8,2,9,4,10,6,11] ; AVX512VL-NEXT: vpermi2d %ymm1, %ymm2, %ymm0 @@ -1211,7 +1211,7 @@ define <8 x i32> @shuffle_v8i32_08192a3b(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_08991abb(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_08991abb: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vshufps {{.*#+}} xmm2 = xmm0[0,0],xmm1[0,0] ; AVX1-NEXT: vshufps {{.*#+}} xmm2 = xmm2[0,2],xmm1[1,1] ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] @@ -1220,7 +1220,7 @@ define <8 x i32> @shuffle_v8i32_08991abb(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8i32_08991abb: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = <u,0,1,1,u,2,3,3> ; AVX2-NEXT: vpermd %ymm1, %ymm2, %ymm1 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero @@ -1229,7 +1229,7 @@ define <8 x i32> @shuffle_v8i32_08991abb(<8 x i32> %a, <8 x i32> %b) { ; AVX2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8i32_08991abb: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm0 = [8,0,1,1,10,2,3,3] ; AVX512VL-NEXT: vpermi2d %ymm2, %ymm1, %ymm0 @@ -1240,7 +1240,7 @@ define <8 x i32> @shuffle_v8i32_08991abb(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_091b2d3f(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_091b2d3f: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm2 = xmm0[0,1,1,3] ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,1,3,3] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 @@ -1248,7 +1248,7 @@ define <8 x i32> @shuffle_v8i32_091b2d3f(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_091b2d3f: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero ; AVX2OR512VL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] ; AVX2OR512VL-NEXT: retq @@ -1258,14 +1258,14 @@ define <8 x i32> @shuffle_v8i32_091b2d3f(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_09ab1def(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_09ab1def: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm2 = xmm0[1,1,3,3] ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 ; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_09ab1def: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero ; AVX2OR512VL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,1,3] ; AVX2OR512VL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] @@ -1276,7 +1276,7 @@ define <8 x i32> @shuffle_v8i32_09ab1def(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00014445(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_00014445: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,1,4,4,4,5] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 1, i32 4, i32 4, i32 4, i32 5> @@ -1285,7 +1285,7 @@ define <8 x i32> @shuffle_v8i32_00014445(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00204464(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_00204464: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,0,4,4,6,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 0, i32 4, i32 4, i32 6, i32 4> @@ -1294,7 +1294,7 @@ define <8 x i32> @shuffle_v8i32_00204464(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_03004744(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_03004744: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,3,0,0,4,7,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 3, i32 0, i32 0, i32 4, i32 7, i32 4, i32 4> @@ -1303,7 +1303,7 @@ define <8 x i32> @shuffle_v8i32_03004744(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_10005444(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_10005444: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,0,0,5,4,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4> @@ -1312,7 +1312,7 @@ define <8 x i32> @shuffle_v8i32_10005444(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_22006644(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_22006644: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[2,2,0,0,6,6,4,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 2, i32 2, i32 0, i32 0, i32 6, i32 6, i32 4, i32 4> @@ -1321,7 +1321,7 @@ define <8 x i32> @shuffle_v8i32_22006644(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_33307774(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_33307774: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,3,3,0,7,7,7,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 3, i32 3, i32 3, i32 0, i32 7, i32 7, i32 7, i32 4> @@ -1330,7 +1330,7 @@ define <8 x i32> @shuffle_v8i32_33307774(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_32107654(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_32107654: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4> @@ -1339,7 +1339,7 @@ define <8 x i32> @shuffle_v8i32_32107654(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00234467(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_00234467: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,3,4,4,6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 3, i32 4, i32 4, i32 6, i32 7> @@ -1348,12 +1348,12 @@ define <8 x i32> @shuffle_v8i32_00234467(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00224466(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00224466: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00224466: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6> @@ -1362,7 +1362,7 @@ define <8 x i32> @shuffle_v8i32_00224466(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_10325476(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_10325476: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,5,4,7,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6> @@ -1371,12 +1371,12 @@ define <8 x i32> @shuffle_v8i32_10325476(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_11335577(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_11335577: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_11335577: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7> @@ -1385,7 +1385,7 @@ define <8 x i32> @shuffle_v8i32_11335577(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_10235467(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_10235467: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,2,3,5,4,6,7] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 0, i32 2, i32 3, i32 5, i32 4, i32 6, i32 7> @@ -1394,7 +1394,7 @@ define <8 x i32> @shuffle_v8i32_10235467(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_10225466(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_10225466: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,2,2,5,4,6,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 0, i32 2, i32 2, i32 5, i32 4, i32 6, i32 6> @@ -1403,12 +1403,12 @@ define <8 x i32> @shuffle_v8i32_10225466(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00015444(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00015444: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,1,5,4,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00015444: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,0,1,5,4,4,4] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1418,12 +1418,12 @@ define <8 x i32> @shuffle_v8i32_00015444(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00204644(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00204644: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,0,4,6,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00204644: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,2,0,4,6,4,4] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1433,12 +1433,12 @@ define <8 x i32> @shuffle_v8i32_00204644(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_03004474(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_03004474: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,3,0,0,4,4,7,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_03004474: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,3,0,0,4,4,7,4] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1448,12 +1448,12 @@ define <8 x i32> @shuffle_v8i32_03004474(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_10004444(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_10004444: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,0,0,4,4,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_10004444: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [1,0,0,0,4,4,4,4] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1463,12 +1463,12 @@ define <8 x i32> @shuffle_v8i32_10004444(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_22006446(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_22006446: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[2,2,0,0,6,4,4,6] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_22006446: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [2,2,0,0,6,4,4,6] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1478,12 +1478,12 @@ define <8 x i32> @shuffle_v8i32_22006446(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_33307474(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_33307474: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,3,3,0,7,4,7,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_33307474: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [3,3,3,0,7,4,7,4] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1493,12 +1493,12 @@ define <8 x i32> @shuffle_v8i32_33307474(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_32104567(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_32104567: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,4,5,6,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_32104567: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [3,2,1,0,4,5,6,7] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1508,12 +1508,12 @@ define <8 x i32> @shuffle_v8i32_32104567(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00236744(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00236744: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,3,6,7,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00236744: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,2,3,6,7,4,4] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1523,12 +1523,12 @@ define <8 x i32> @shuffle_v8i32_00236744(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00226644(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00226644: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,2,6,6,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00226644: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,2,2,6,6,4,4] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1538,12 +1538,12 @@ define <8 x i32> @shuffle_v8i32_00226644(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_10324567(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_10324567: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,4,5,6,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_10324567: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [1,0,3,2,4,5,6,7] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1553,12 +1553,12 @@ define <8 x i32> @shuffle_v8i32_10324567(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_11334567(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_11334567: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,1,3,3,4,5,6,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_11334567: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,3,3,4,5,6,7] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1568,12 +1568,12 @@ define <8 x i32> @shuffle_v8i32_11334567(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_01235467(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_01235467: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,1,2,3,5,4,6,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_01235467: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,1,2,3,5,4,6,7] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1583,12 +1583,12 @@ define <8 x i32> @shuffle_v8i32_01235467(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_01235466(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_01235466: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,1,2,3,5,4,6,6] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_01235466: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = [0,1,2,3,5,4,6,6] ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1598,12 +1598,12 @@ define <8 x i32> @shuffle_v8i32_01235466(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_002u6u44(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_002u6u44: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,u,6,u,4,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_002u6u44: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <0,0,2,u,6,u,4,4> ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1613,12 +1613,12 @@ define <8 x i32> @shuffle_v8i32_002u6u44(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_00uu66uu(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_00uu66uu: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,u,u,6,6,u,u] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_00uu66uu: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <0,0,u,u,6,6,u,u> ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1628,12 +1628,12 @@ define <8 x i32> @shuffle_v8i32_00uu66uu(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_103245uu(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_103245uu: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,4,5,u,u] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_103245uu: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <1,0,3,2,4,5,u,u> ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1643,12 +1643,12 @@ define <8 x i32> @shuffle_v8i32_103245uu(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_1133uu67(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_1133uu67: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,1,3,3,u,u,6,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_1133uu67: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <1,1,3,3,u,u,6,7> ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1658,12 +1658,12 @@ define <8 x i32> @shuffle_v8i32_1133uu67(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_0uu354uu(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_0uu354uu: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,u,u,3,5,4,u,u] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_0uu354uu: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <0,u,u,3,5,4,u,u> ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1673,12 +1673,12 @@ define <8 x i32> @shuffle_v8i32_0uu354uu(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_uuu3uu66(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_uuu3uu66: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[u,u,u,3,u,u,6,6] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_uuu3uu66: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <u,u,u,3,u,u,6,6> ; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1688,7 +1688,7 @@ define <8 x i32> @shuffle_v8i32_uuu3uu66(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_6caa87e5(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_6caa87e5: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,2] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm1[2,3,0,1] @@ -1697,7 +1697,7 @@ define <8 x i32> @shuffle_v8i32_6caa87e5(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8i32_6caa87e5: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,1,3,2] ; AVX2-NEXT: vpermilps {{.*#+}} ymm1 = ymm1[0,0,2,2,4,4,6,6] ; AVX2-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[2,1,0,3] @@ -1705,7 +1705,7 @@ define <8 x i32> @shuffle_v8i32_6caa87e5(<8 x i32> %a, <8 x i32> %b) { ; AVX2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8i32_6caa87e5: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [14,4,2,2,0,15,6,13] ; AVX512VL-NEXT: vpermi2d %ymm0, %ymm1, %ymm2 ; AVX512VL-NEXT: vmovdqa %ymm2, %ymm0 @@ -1716,13 +1716,13 @@ define <8 x i32> @shuffle_v8i32_6caa87e5(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_32103210(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_32103210: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_32103210: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,0,1] ; AVX2OR512VL-NEXT: retq @@ -1732,13 +1732,13 @@ define <8 x i32> @shuffle_v8i32_32103210(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_76547654(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_76547654: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_76547654: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,3,2,3] ; AVX2OR512VL-NEXT: retq @@ -1748,13 +1748,13 @@ define <8 x i32> @shuffle_v8i32_76547654(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_76543210(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_76543210: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_76543210: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX2OR512VL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,3,0,1] ; AVX2OR512VL-NEXT: retq @@ -1764,7 +1764,7 @@ define <8 x i32> @shuffle_v8i32_76543210(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_3210ba98(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_3210ba98: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; ALL-NEXT: retq @@ -1774,13 +1774,13 @@ define <8 x i32> @shuffle_v8i32_3210ba98(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_3210fedc(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_3210fedc: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_3210fedc: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX2OR512VL-NEXT: retq @@ -1790,13 +1790,13 @@ define <8 x i32> @shuffle_v8i32_3210fedc(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_7654fedc(<8 x i32> %a, <8 x i32> %b) { ; AVX1OR2-LABEL: shuffle_v8i32_7654fedc: -; AVX1OR2: # BB#0: +; AVX1OR2: # %bb.0: ; AVX1OR2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3] ; AVX1OR2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX1OR2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8i32_7654fedc: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3] ; AVX512VL-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX512VL-NEXT: retq @@ -1806,13 +1806,13 @@ define <8 x i32> @shuffle_v8i32_7654fedc(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_fedc7654(<8 x i32> %a, <8 x i32> %b) { ; AVX1OR2-LABEL: shuffle_v8i32_fedc7654: -; AVX1OR2: # BB#0: +; AVX1OR2: # %bb.0: ; AVX1OR2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[2,3] ; AVX1OR2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX1OR2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8i32_fedc7654: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[2,3] ; AVX512VL-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX512VL-NEXT: retq @@ -1822,13 +1822,13 @@ define <8 x i32> @shuffle_v8i32_fedc7654(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_ba987654(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_ba987654: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_ba987654: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX2OR512VL-NEXT: retq @@ -1838,13 +1838,13 @@ define <8 x i32> @shuffle_v8i32_ba987654(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_ba983210(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_ba983210: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_ba983210: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] ; AVX2OR512VL-NEXT: retq @@ -1854,13 +1854,13 @@ define <8 x i32> @shuffle_v8i32_ba983210(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_zuu8zuuc(<8 x i32> %a) { ; AVX1-LABEL: shuffle_v8i32_zuu8zuuc: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1 ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,0],ymm1[4,5],ymm0[6,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_zuu8zuuc: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpslldq {{.*#+}} ymm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[0,1,2,3],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,18,19] ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> zeroinitializer, <8 x i32> %a, <8 x i32> <i32 0, i32 undef, i32 undef, i32 8, i32 0, i32 undef, i32 undef, i32 12> @@ -1869,14 +1869,14 @@ define <8 x i32> @shuffle_v8i32_zuu8zuuc(<8 x i32> %a) { define <8 x i32> @shuffle_v8i32_9ubzdefz(<8 x i32> %a) { ; AVX1-LABEL: shuffle_v8i32_9ubzdefz: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1 ; AVX1-NEXT: vshufps {{.*#+}} ymm1 = ymm1[3,0],ymm0[3,0],ymm1[7,4],ymm0[7,4] ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,2],ymm1[2,0],ymm0[5,6],ymm1[6,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_9ubzdefz: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpsrldq {{.*#+}} ymm0 = ymm0[4,5,6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,ymm0[20,21,22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> zeroinitializer, <8 x i32> %a, <8 x i32> <i32 9, i32 undef, i32 11, i32 0, i32 13, i32 14, i32 15, i32 0> @@ -1885,7 +1885,7 @@ define <8 x i32> @shuffle_v8i32_9ubzdefz(<8 x i32> %a) { define <8 x i32> @shuffle_v8i32_80u1b4uu(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_80u1b4uu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vunpcklps {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[4],ymm0[4],ymm1[5],ymm0[5] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 0, i32 undef, i32 1, i32 12, i32 4, i32 undef, i32 undef> @@ -1894,7 +1894,7 @@ define <8 x i32> @shuffle_v8i32_80u1b4uu(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_uuuu1111(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_uuuu1111: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1] ; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; ALL-NEXT: retq @@ -1904,7 +1904,7 @@ define <8 x i32> @shuffle_v8i32_uuuu1111(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_2222uuuu(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_2222uuuu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,2,2] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 undef, i32 undef, i32 undef, i32 undef> @@ -1913,7 +1913,7 @@ define <8 x i32> @shuffle_v8i32_2222uuuu(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_2A3Buuuu(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_2A3Buuuu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 undef, i32 undef, i32 undef, i32 undef> @@ -1922,13 +1922,13 @@ define <8 x i32> @shuffle_v8i32_2A3Buuuu(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_44444444(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_44444444: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_44444444: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX2OR512VL-NEXT: vbroadcastss %xmm0, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1938,13 +1938,13 @@ define <8 x i32> @shuffle_v8i32_44444444(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_44444444_bc(<8 x float> %a, <8 x float> %b) { ; AVX1-LABEL: shuffle_v8i32_44444444_bc: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_44444444_bc: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX2OR512VL-NEXT: vbroadcastss %xmm0, %ymm0 ; AVX2OR512VL-NEXT: retq @@ -1956,7 +1956,7 @@ define <8 x i32> @shuffle_v8i32_44444444_bc(<8 x float> %a, <8 x float> %b) { define <8 x i32> @shuffle_v8i32_5555uuuu(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_5555uuuu: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vextractf128 $1, %ymm0, %xmm0 ; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1] ; ALL-NEXT: retq @@ -1967,12 +1967,12 @@ define <8 x i32> @shuffle_v8i32_5555uuuu(<8 x i32> %a, <8 x i32> %b) { ; PR32453 define <8 x i32> @shuffle_v8i32_uuuuuu7u(<8 x i32> %a, <8 x i32> %b) nounwind { ; AVX1-LABEL: shuffle_v8i32_uuuuuu7u: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_uuuuuu7u: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,1,3,3,4,5,7,7] ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 7, i32 undef> @@ -1981,7 +1981,7 @@ define <8 x i32> @shuffle_v8i32_uuuuuu7u(<8 x i32> %a, <8 x i32> %b) nounwind { define <8 x float> @splat_mem_v8f32_2(float* %p) { ; ALL-LABEL: splat_mem_v8f32_2: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vbroadcastss (%rdi), %ymm0 ; ALL-NEXT: retq %1 = load float, float* %p @@ -1992,13 +1992,13 @@ define <8 x float> @splat_mem_v8f32_2(float* %p) { define <8 x float> @splat_v8f32(<4 x float> %r) { ; AVX1-LABEL: splat_v8f32: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: splat_v8f32: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vbroadcastss %xmm0, %ymm0 ; AVX2OR512VL-NEXT: retq %1 = shufflevector <4 x float> %r, <4 x float> undef, <8 x i32> zeroinitializer @@ -2011,14 +2011,14 @@ define <8 x float> @splat_v8f32(<4 x float> %r) { define <8 x i32> @shuffle_v8i32_z0U2zUz6(<8 x i32> %a) { ; AVX1-LABEL: shuffle_v8i32_z0U2zUz6: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1 ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm1[0,2],ymm0[4,6],ymm1[4,6] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[2,0,3,1,6,4,7,5] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_z0U2zUz6: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpsllq $32, %ymm0, %ymm0 ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> zeroinitializer, <8 x i32> <i32 8, i32 0, i32 undef, i32 2, i32 8, i32 undef, i32 8, i32 6> @@ -2027,14 +2027,14 @@ define <8 x i32> @shuffle_v8i32_z0U2zUz6(<8 x i32> %a) { define <8 x i32> @shuffle_v8i32_1U3z5zUU(<8 x i32> %a) { ; AVX1-LABEL: shuffle_v8i32_1U3z5zUU: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1 ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm1[1,3],ymm0[5,7],ymm1[5,7] ; AVX1-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_1U3z5zUU: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpsrlq $32, %ymm0, %ymm0 ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> zeroinitializer, <8 x i32> <i32 1, i32 undef, i32 3, i32 8, i32 5, i32 8, i32 undef, i32 undef> @@ -2043,13 +2043,13 @@ define <8 x i32> @shuffle_v8i32_1U3z5zUU(<8 x i32> %a) { define <8 x i32> @shuffle_v8i32_B012F456(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_B012F456: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vshufps {{.*#+}} ymm1 = ymm1[3,0],ymm0[0,0],ymm1[7,4],ymm0[4,4] ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[1,2],ymm1[4,6],ymm0[5,6] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_B012F456: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpalignr {{.*#+}} ymm0 = ymm1[12,13,14,15],ymm0[0,1,2,3,4,5,6,7,8,9,10,11],ymm1[28,29,30,31],ymm0[16,17,18,19,20,21,22,23,24,25,26,27] ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 11, i32 0, i32 1, i32 2, i32 15, i32 4, i32 5, i32 6> @@ -2058,13 +2058,13 @@ define <8 x i32> @shuffle_v8i32_B012F456(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_1238567C(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_1238567C: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vshufps {{.*#+}} ymm1 = ymm1[0,0],ymm0[3,0],ymm1[4,4],ymm0[7,4] ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,2],ymm1[2,0],ymm0[5,6],ymm1[6,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_1238567C: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpalignr {{.*#+}} ymm0 = ymm0[4,5,6,7,8,9,10,11,12,13,14,15],ymm1[0,1,2,3],ymm0[20,21,22,23,24,25,26,27,28,29,30,31],ymm1[16,17,18,19] ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 2, i32 3, i32 8, i32 5, i32 6, i32 7, i32 12> @@ -2073,13 +2073,13 @@ define <8 x i32> @shuffle_v8i32_1238567C(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_9AB0DEF4(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_9AB0DEF4: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0],ymm1[3,0],ymm0[4,4],ymm1[7,4] ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[1,2],ymm0[2,0],ymm1[5,6],ymm0[6,4] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_9AB0DEF4: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpalignr {{.*#+}} ymm0 = ymm1[4,5,6,7,8,9,10,11,12,13,14,15],ymm0[0,1,2,3],ymm1[20,21,22,23,24,25,26,27,28,29,30,31],ymm0[16,17,18,19] ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 9, i32 10, i32 11, i32 0, i32 13, i32 14, i32 15, i32 4> @@ -2088,13 +2088,13 @@ define <8 x i32> @shuffle_v8i32_9AB0DEF4(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_389A7CDE(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_389A7CDE: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[3,0],ymm1[0,0],ymm0[7,4],ymm1[4,4] ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm1[1,2],ymm0[4,6],ymm1[5,6] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: shuffle_v8i32_389A7CDE: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vpalignr {{.*#+}} ymm0 = ymm0[12,13,14,15],ymm1[0,1,2,3,4,5,6,7,8,9,10,11],ymm0[28,29,30,31],ymm1[16,17,18,19,20,21,22,23,24,25,26,27] ; AVX2OR512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 3, i32 8, i32 9, i32 10, i32 7, i32 12, i32 13, i32 14> @@ -2103,7 +2103,7 @@ define <8 x i32> @shuffle_v8i32_389A7CDE(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_30127456(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_30127456: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,0,1,2,7,4,5,6] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 3, i32 0, i32 1, i32 2, i32 7, i32 4, i32 5, i32 6> @@ -2112,7 +2112,7 @@ define <8 x i32> @shuffle_v8i32_30127456(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_12305674(<8 x i32> %a, <8 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_12305674: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,2,3,0,5,6,7,4] ; ALL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7, i32 4> @@ -2121,7 +2121,7 @@ define <8 x i32> @shuffle_v8i32_12305674(<8 x i32> %a, <8 x i32> %b) { define <8x float> @concat_v2f32_1(<2 x float>* %tmp64, <2 x float>* %tmp65) { ; ALL-LABEL: concat_v2f32_1: -; ALL: # BB#0: # %entry +; ALL: # %bb.0: # %entry ; ALL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; ALL-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0] ; ALL-NEXT: retq @@ -2136,7 +2136,7 @@ entry: define <8x float> @concat_v2f32_2(<2 x float>* %tmp64, <2 x float>* %tmp65) { ; ALL-LABEL: concat_v2f32_2: -; ALL: # BB#0: # %entry +; ALL: # %bb.0: # %entry ; ALL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; ALL-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0] ; ALL-NEXT: retq @@ -2149,7 +2149,7 @@ entry: define <8x float> @concat_v2f32_3(<2 x float>* %tmp64, <2 x float>* %tmp65) { ; ALL-LABEL: concat_v2f32_3: -; ALL: # BB#0: # %entry +; ALL: # %bb.0: # %entry ; ALL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; ALL-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0] ; ALL-NEXT: retq @@ -2163,7 +2163,7 @@ entry: define <8 x i32> @insert_mem_and_zero_v8i32(i32* %ptr) { ; ALL-LABEL: insert_mem_and_zero_v8i32: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; ALL-NEXT: retq %a = load i32, i32* %ptr @@ -2174,12 +2174,12 @@ define <8 x i32> @insert_mem_and_zero_v8i32(i32* %ptr) { define <8 x i32> @concat_v8i32_0123CDEF(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: concat_v8i32_0123CDEF: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3] ; AVX1-NEXT: retq ; ; AVX2OR512VL-LABEL: concat_v8i32_0123CDEF: -; AVX2OR512VL: # BB#0: +; AVX2OR512VL: # %bb.0: ; AVX2OR512VL-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] ; AVX2OR512VL-NEXT: retq %alo = shufflevector <8 x i32> %a, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -2190,12 +2190,12 @@ define <8 x i32> @concat_v8i32_0123CDEF(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @concat_v8i32_4567CDEF_bc(<8 x i32> %a0, <8 x i32> %a1) { ; AVX1OR2-LABEL: concat_v8i32_4567CDEF_bc: -; AVX1OR2: # BB#0: +; AVX1OR2: # %bb.0: ; AVX1OR2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3] ; AVX1OR2-NEXT: retq ; ; AVX512VL-LABEL: concat_v8i32_4567CDEF_bc: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3] ; AVX512VL-NEXT: retq %a0hi = shufflevector <8 x i32> %a0, <8 x i32> %a1, <4 x i32> <i32 4, i32 5, i32 6, i32 7> @@ -2209,7 +2209,7 @@ define <8 x i32> @concat_v8i32_4567CDEF_bc(<8 x i32> %a0, <8 x i32> %a1) { define <8 x float> @concat_v8f32_4567CDEF_bc(<8 x float> %f0, <8 x float> %f1) { ; ALL-LABEL: concat_v8f32_4567CDEF_bc: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3] ; ALL-NEXT: retq %a0 = bitcast <8 x float> %f0 to <4 x i64> @@ -2225,7 +2225,7 @@ define <8 x float> @concat_v8f32_4567CDEF_bc(<8 x float> %f0, <8 x float> %f1) { define <8 x i32> @insert_dup_mem_v8i32(i32* %ptr) { ; ALL-LABEL: insert_dup_mem_v8i32: -; ALL: # BB#0: +; ALL: # %bb.0: ; ALL-NEXT: vbroadcastss (%rdi), %ymm0 ; ALL-NEXT: retq %tmp = load i32, i32* %ptr, align 4 @@ -2236,7 +2236,7 @@ define <8 x i32> @insert_dup_mem_v8i32(i32* %ptr) { define <8 x i32> @shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_12345678: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3,4,5,6,7] ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1] ; AVX1-NEXT: vshufps {{.*#+}} ymm1 = ymm1[0,0],ymm0[3,0],ymm1[4,4],ymm0[7,4] @@ -2244,14 +2244,14 @@ define <8 x i32> @shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8i32_12345678: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3,4,5,6,7] ; AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [1,2,3,4,5,6,7,0] ; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8i32_12345678: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: valignd {{.*#+}} ymm0 = ymm0[1,2,3,4,5,6,7],ymm1[0] ; AVX512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8> @@ -2260,20 +2260,20 @@ define <8 x i32> @shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_12345670(<8 x i32> %a) { ; AVX1-LABEL: shuffle_v8i32_12345670: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vperm2f128 {{.*#+}} ymm1 = ymm0[2,3,0,1] ; AVX1-NEXT: vshufps {{.*#+}} ymm1 = ymm1[0,0],ymm0[3,0],ymm1[4,4],ymm0[7,4] ; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,2],ymm1[2,0],ymm0[5,6],ymm1[6,4] ; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8i32_12345670: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [1,2,3,4,5,6,7,0] ; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 ; AVX2-NEXT: retq ; ; AVX512VL-LABEL: shuffle_v8i32_12345670: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: valignd {{.*#+}} ymm0 = ymm0[1,2,3,4,5,6,7,0] ; AVX512VL-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0> |
