diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/vec_fabs.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_fabs.ll | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/X86/vec_fabs.ll b/llvm/test/CodeGen/X86/vec_fabs.ll index c73913d1667..fab480fe7d2 100644 --- a/llvm/test/CodeGen/X86/vec_fabs.ll +++ b/llvm/test/CodeGen/X86/vec_fabs.ll @@ -6,9 +6,6 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64_AVX512VL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64_AVX512VLDQ -; FIXME: Drop the regex pattern matching of 'nan' once we drop support for MSVC -; 2013. - define <2 x double> @fabs_v2f64(<2 x double> %p) { ; X32-LABEL: fabs_v2f64: ; X32: # %bb.0: @@ -132,7 +129,7 @@ declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p) define <8 x double> @fabs_v8f64(<8 x double> %p) { ; X32_AVX-LABEL: fabs_v8f64: ; X32_AVX: # %bb.0: -; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}] +; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN] ; X32_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0 ; X32_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32_AVX-NEXT: retl @@ -149,7 +146,7 @@ define <8 x double> @fabs_v8f64(<8 x double> %p) { ; ; X64_AVX-LABEL: fabs_v8f64: ; X64_AVX: # %bb.0: -; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}] +; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN] ; X64_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0 ; X64_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64_AVX-NEXT: retq @@ -171,7 +168,7 @@ declare <8 x double> @llvm.fabs.v8f64(<8 x double> %p) define <16 x float> @fabs_v16f32(<16 x float> %p) { ; X32_AVX-LABEL: fabs_v16f32: ; X32_AVX: # %bb.0: -; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}] +; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN] ; X32_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0 ; X32_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32_AVX-NEXT: retl @@ -188,7 +185,7 @@ define <16 x float> @fabs_v16f32(<16 x float> %p) { ; ; X64_AVX-LABEL: fabs_v16f32: ; X64_AVX: # %bb.0: -; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}] +; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN] ; X64_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0 ; X64_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64_AVX-NEXT: retq |
