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Diffstat (limited to 'llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll')
-rw-r--r--llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll210
1 files changed, 117 insertions, 93 deletions
diff --git a/llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll b/llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
index bcb002823d9..053d708c4af 100644
--- a/llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
@@ -163,7 +163,7 @@ define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {
; AVX-32-NEXT: subl $32, %esp
; AVX-32-NEXT: vpermilpd {{.*#+}} xmm3 = xmm0[1,0]
; AVX-32-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
-; AVX-32-NEXT: vucomisd %xmm1, %xmm3
+; AVX-32-NEXT: vcomisd %xmm1, %xmm3
; AVX-32-NEXT: vxorpd %xmm2, %xmm2, %xmm2
; AVX-32-NEXT: vxorpd %xmm4, %xmm4, %xmm4
; AVX-32-NEXT: jb .LBB1_2
@@ -180,7 +180,7 @@ define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {
; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %eax
; AVX-32-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX-32-NEXT: vpermilpd {{.*#+}} xmm4 = xmm3[1,0]
-; AVX-32-NEXT: vucomisd %xmm1, %xmm4
+; AVX-32-NEXT: vcomisd %xmm1, %xmm4
; AVX-32-NEXT: vxorpd %xmm5, %xmm5, %xmm5
; AVX-32-NEXT: jb .LBB1_4
; AVX-32-NEXT: # %bb.3:
@@ -194,7 +194,7 @@ define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {
; AVX-32-NEXT: movzbl %cl, %ecx
; AVX-32-NEXT: shll $31, %ecx
; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx
-; AVX-32-NEXT: vucomisd %xmm1, %xmm3
+; AVX-32-NEXT: vcomisd %xmm1, %xmm3
; AVX-32-NEXT: vxorpd %xmm4, %xmm4, %xmm4
; AVX-32-NEXT: jb .LBB1_6
; AVX-32-NEXT: # %bb.5:
@@ -208,7 +208,7 @@ define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {
; AVX-32-NEXT: movzbl %dl, %edx
; AVX-32-NEXT: shll $31, %edx
; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %edx
-; AVX-32-NEXT: vucomisd %xmm1, %xmm0
+; AVX-32-NEXT: vcomisd %xmm1, %xmm0
; AVX-32-NEXT: jb .LBB1_8
; AVX-32-NEXT: # %bb.7:
; AVX-32-NEXT: vmovapd %xmm1, %xmm2
@@ -237,53 +237,65 @@ define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {
;
; AVX-64-LABEL: strict_vector_fptoui_v4f64_to_v4i64:
; AVX-64: # %bb.0:
-; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm2
+; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX-64-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
-; AVX-64-NEXT: xorl %eax, %eax
-; AVX-64-NEXT: vucomisd %xmm1, %xmm2
+; AVX-64-NEXT: vcomisd %xmm1, %xmm3
+; AVX-64-NEXT: vxorpd %xmm2, %xmm2, %xmm2
+; AVX-64-NEXT: vxorpd %xmm4, %xmm4, %xmm4
+; AVX-64-NEXT: jb .LBB1_2
+; AVX-64-NEXT: # %bb.1:
+; AVX-64-NEXT: vmovapd %xmm1, %xmm4
+; AVX-64-NEXT: .LBB1_2:
+; AVX-64-NEXT: vsubsd %xmm4, %xmm3, %xmm4
+; AVX-64-NEXT: vcvttsd2si %xmm4, %rcx
; AVX-64-NEXT: setae %al
+; AVX-64-NEXT: movzbl %al, %eax
; AVX-64-NEXT: shlq $63, %rax
-; AVX-64-NEXT: vcmpltsd %xmm1, %xmm2, %xmm3
-; AVX-64-NEXT: vandnpd %xmm1, %xmm3, %xmm3
-; AVX-64-NEXT: vsubsd %xmm3, %xmm2, %xmm3
-; AVX-64-NEXT: vcvttsd2si %xmm3, %rcx
+; AVX-64-NEXT: xorq %rcx, %rax
+; AVX-64-NEXT: vpermilpd {{.*#+}} xmm4 = xmm3[1,0]
+; AVX-64-NEXT: vcomisd %xmm1, %xmm4
+; AVX-64-NEXT: vxorpd %xmm5, %xmm5, %xmm5
+; AVX-64-NEXT: jb .LBB1_4
+; AVX-64-NEXT: # %bb.3:
+; AVX-64-NEXT: vmovapd %xmm1, %xmm5
+; AVX-64-NEXT: .LBB1_4:
+; AVX-64-NEXT: vmovq %rax, %xmm3
+; AVX-64-NEXT: vsubsd %xmm5, %xmm4, %xmm4
+; AVX-64-NEXT: vcvttsd2si %xmm4, %rax
+; AVX-64-NEXT: setae %cl
+; AVX-64-NEXT: movzbl %cl, %ecx
+; AVX-64-NEXT: shlq $63, %rcx
; AVX-64-NEXT: xorq %rax, %rcx
-; AVX-64-NEXT: vmovq %rcx, %xmm3
-; AVX-64-NEXT: vpermilpd {{.*#+}} xmm2 = xmm2[1,0]
-; AVX-64-NEXT: xorl %eax, %eax
-; AVX-64-NEXT: vucomisd %xmm1, %xmm2
-; AVX-64-NEXT: setae %al
-; AVX-64-NEXT: shlq $63, %rax
-; AVX-64-NEXT: vcmpltsd %xmm1, %xmm2, %xmm4
-; AVX-64-NEXT: vandnpd %xmm1, %xmm4, %xmm4
-; AVX-64-NEXT: vsubsd %xmm4, %xmm2, %xmm2
-; AVX-64-NEXT: vcvttsd2si %xmm2, %rcx
-; AVX-64-NEXT: xorq %rax, %rcx
-; AVX-64-NEXT: vmovq %rcx, %xmm2
-; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
-; AVX-64-NEXT: xorl %eax, %eax
-; AVX-64-NEXT: vucomisd %xmm1, %xmm0
-; AVX-64-NEXT: setae %al
-; AVX-64-NEXT: shlq $63, %rax
-; AVX-64-NEXT: vcmpltsd %xmm1, %xmm0, %xmm3
-; AVX-64-NEXT: vandnpd %xmm1, %xmm3, %xmm3
-; AVX-64-NEXT: vsubsd %xmm3, %xmm0, %xmm3
-; AVX-64-NEXT: vcvttsd2si %xmm3, %rcx
+; AVX-64-NEXT: vmovq %rcx, %xmm4
+; AVX-64-NEXT: vcomisd %xmm1, %xmm0
+; AVX-64-NEXT: vxorpd %xmm5, %xmm5, %xmm5
+; AVX-64-NEXT: jb .LBB1_6
+; AVX-64-NEXT: # %bb.5:
+; AVX-64-NEXT: vmovapd %xmm1, %xmm5
+; AVX-64-NEXT: .LBB1_6:
+; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]
+; AVX-64-NEXT: vsubsd %xmm5, %xmm0, %xmm4
+; AVX-64-NEXT: vcvttsd2si %xmm4, %rax
+; AVX-64-NEXT: setae %cl
+; AVX-64-NEXT: movzbl %cl, %ecx
+; AVX-64-NEXT: shlq $63, %rcx
; AVX-64-NEXT: xorq %rax, %rcx
-; AVX-64-NEXT: vmovq %rcx, %xmm3
+; AVX-64-NEXT: vmovq %rcx, %xmm4
; AVX-64-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; AVX-64-NEXT: xorl %eax, %eax
-; AVX-64-NEXT: vucomisd %xmm1, %xmm0
-; AVX-64-NEXT: setae %al
-; AVX-64-NEXT: shlq $63, %rax
-; AVX-64-NEXT: vcmpltsd %xmm1, %xmm0, %xmm4
-; AVX-64-NEXT: vandnpd %xmm1, %xmm4, %xmm1
-; AVX-64-NEXT: vsubsd %xmm1, %xmm0, %xmm0
-; AVX-64-NEXT: vcvttsd2si %xmm0, %rcx
+; AVX-64-NEXT: vcomisd %xmm1, %xmm0
+; AVX-64-NEXT: jb .LBB1_8
+; AVX-64-NEXT: # %bb.7:
+; AVX-64-NEXT: vmovapd %xmm1, %xmm2
+; AVX-64-NEXT: .LBB1_8:
+; AVX-64-NEXT: vsubsd %xmm2, %xmm0, %xmm0
+; AVX-64-NEXT: vcvttsd2si %xmm0, %rax
+; AVX-64-NEXT: setae %cl
+; AVX-64-NEXT: movzbl %cl, %ecx
+; AVX-64-NEXT: shlq $63, %rcx
; AVX-64-NEXT: xorq %rax, %rcx
; AVX-64-NEXT: vmovq %rcx, %xmm0
-; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm3[0],xmm0[0]
-; AVX-64-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm4[0],xmm0[0]
+; AVX-64-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX-64-NEXT: retq
;
; AVX512VL-32-LABEL: strict_vector_fptoui_v4f64_to_v4i64:
@@ -301,7 +313,7 @@ define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {
; AVX512VL-32-NEXT: .cfi_offset %ebx, -12
; AVX512VL-32-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
; AVX512VL-32-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
-; AVX512VL-32-NEXT: vucomisd %xmm1, %xmm2
+; AVX512VL-32-NEXT: vcomisd %xmm1, %xmm2
; AVX512VL-32-NEXT: setb %cl
; AVX512VL-32-NEXT: kmovw %ecx, %k1
; AVX512VL-32-NEXT: vxorpd %xmm3, %xmm3, %xmm3
@@ -319,7 +331,7 @@ define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {
; AVX512VL-32-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX512VL-32-NEXT: vpermilpd {{.*#+}} xmm4 = xmm2[1,0]
; AVX512VL-32-NEXT: xorl %ecx, %ecx
-; AVX512VL-32-NEXT: vucomisd %xmm1, %xmm4
+; AVX512VL-32-NEXT: vcomisd %xmm1, %xmm4
; AVX512VL-32-NEXT: setb %dl
; AVX512VL-32-NEXT: kmovw %edx, %k1
; AVX512VL-32-NEXT: vmovapd %xmm1, %xmm5
@@ -332,7 +344,7 @@ define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {
; AVX512VL-32-NEXT: shll $31, %ecx
; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx
; AVX512VL-32-NEXT: xorl %edx, %edx
-; AVX512VL-32-NEXT: vucomisd %xmm1, %xmm2
+; AVX512VL-32-NEXT: vcomisd %xmm1, %xmm2
; AVX512VL-32-NEXT: setb %bl
; AVX512VL-32-NEXT: kmovw %ebx, %k1
; AVX512VL-32-NEXT: vmovapd %xmm1, %xmm4
@@ -345,7 +357,7 @@ define <4 x i64> @strict_vector_fptoui_v4f64_to_v4i64(<4 x double> %a) #0 {
; AVX512VL-32-NEXT: shll $31, %edx
; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %edx
; AVX512VL-32-NEXT: xorl %ebx, %ebx
-; AVX512VL-32-NEXT: vucomisd %xmm1, %xmm0
+; AVX512VL-32-NEXT: vcomisd %xmm1, %xmm0
; AVX512VL-32-NEXT: setb %al
; AVX512VL-32-NEXT: kmovw %eax, %k1
; AVX512VL-32-NEXT: vmovsd %xmm3, %xmm1, %xmm1 {%k1}
@@ -532,7 +544,7 @@ define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {
; AVX-32-NEXT: subl $32, %esp
; AVX-32-NEXT: vmovshdup {{.*#+}} xmm3 = xmm0[1,1,3,3]
; AVX-32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; AVX-32-NEXT: vucomiss %xmm1, %xmm3
+; AVX-32-NEXT: vcomiss %xmm1, %xmm3
; AVX-32-NEXT: vxorps %xmm2, %xmm2, %xmm2
; AVX-32-NEXT: vxorps %xmm4, %xmm4, %xmm4
; AVX-32-NEXT: jb .LBB3_2
@@ -548,7 +560,7 @@ define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {
; AVX-32-NEXT: shll $31, %eax
; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %eax
; AVX-32-NEXT: vpermilps {{.*#+}} xmm3 = xmm0[3,1,2,3]
-; AVX-32-NEXT: vucomiss %xmm1, %xmm3
+; AVX-32-NEXT: vcomiss %xmm1, %xmm3
; AVX-32-NEXT: vxorps %xmm4, %xmm4, %xmm4
; AVX-32-NEXT: jb .LBB3_4
; AVX-32-NEXT: # %bb.3:
@@ -563,7 +575,7 @@ define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {
; AVX-32-NEXT: shll $31, %ecx
; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx
; AVX-32-NEXT: vpermilpd {{.*#+}} xmm3 = xmm0[1,0]
-; AVX-32-NEXT: vucomiss %xmm1, %xmm3
+; AVX-32-NEXT: vcomiss %xmm1, %xmm3
; AVX-32-NEXT: vxorps %xmm4, %xmm4, %xmm4
; AVX-32-NEXT: jb .LBB3_6
; AVX-32-NEXT: # %bb.5:
@@ -577,7 +589,7 @@ define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {
; AVX-32-NEXT: movzbl %dl, %edx
; AVX-32-NEXT: shll $31, %edx
; AVX-32-NEXT: xorl {{[0-9]+}}(%esp), %edx
-; AVX-32-NEXT: vucomiss %xmm1, %xmm0
+; AVX-32-NEXT: vcomiss %xmm1, %xmm0
; AVX-32-NEXT: jb .LBB3_8
; AVX-32-NEXT: # %bb.7:
; AVX-32-NEXT: vmovaps %xmm1, %xmm2
@@ -606,53 +618,65 @@ define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {
;
; AVX-64-LABEL: strict_vector_fptoui_v4f32_to_v4i64:
; AVX-64: # %bb.0:
-; AVX-64-NEXT: vpermilps {{.*#+}} xmm2 = xmm0[3,1,2,3]
+; AVX-64-NEXT: vpermilps {{.*#+}} xmm3 = xmm0[3,1,2,3]
; AVX-64-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; AVX-64-NEXT: xorl %eax, %eax
-; AVX-64-NEXT: vucomiss %xmm1, %xmm2
-; AVX-64-NEXT: setae %al
-; AVX-64-NEXT: shlq $63, %rax
-; AVX-64-NEXT: vcmpltss %xmm1, %xmm2, %xmm3
-; AVX-64-NEXT: vandnps %xmm1, %xmm3, %xmm3
-; AVX-64-NEXT: vsubss %xmm3, %xmm2, %xmm2
-; AVX-64-NEXT: vcvttss2si %xmm2, %rcx
-; AVX-64-NEXT: xorq %rax, %rcx
-; AVX-64-NEXT: vmovq %rcx, %xmm2
-; AVX-64-NEXT: vpermilpd {{.*#+}} xmm3 = xmm0[1,0]
-; AVX-64-NEXT: xorl %eax, %eax
-; AVX-64-NEXT: vucomiss %xmm1, %xmm3
-; AVX-64-NEXT: setae %al
-; AVX-64-NEXT: shlq $63, %rax
-; AVX-64-NEXT: vcmpltss %xmm1, %xmm3, %xmm4
-; AVX-64-NEXT: vandnps %xmm1, %xmm4, %xmm4
+; AVX-64-NEXT: vcomiss %xmm1, %xmm3
+; AVX-64-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-64-NEXT: vxorps %xmm4, %xmm4, %xmm4
+; AVX-64-NEXT: jb .LBB3_2
+; AVX-64-NEXT: # %bb.1:
+; AVX-64-NEXT: vmovaps %xmm1, %xmm4
+; AVX-64-NEXT: .LBB3_2:
; AVX-64-NEXT: vsubss %xmm4, %xmm3, %xmm3
; AVX-64-NEXT: vcvttss2si %xmm3, %rcx
-; AVX-64-NEXT: xorq %rax, %rcx
-; AVX-64-NEXT: vmovq %rcx, %xmm3
-; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
-; AVX-64-NEXT: xorl %eax, %eax
-; AVX-64-NEXT: vucomiss %xmm1, %xmm0
; AVX-64-NEXT: setae %al
+; AVX-64-NEXT: movzbl %al, %eax
; AVX-64-NEXT: shlq $63, %rax
-; AVX-64-NEXT: vcmpltss %xmm1, %xmm0, %xmm3
-; AVX-64-NEXT: vandnps %xmm1, %xmm3, %xmm3
-; AVX-64-NEXT: vsubss %xmm3, %xmm0, %xmm3
-; AVX-64-NEXT: vcvttss2si %xmm3, %rcx
+; AVX-64-NEXT: xorq %rcx, %rax
+; AVX-64-NEXT: vpermilpd {{.*#+}} xmm4 = xmm0[1,0]
+; AVX-64-NEXT: vcomiss %xmm1, %xmm4
+; AVX-64-NEXT: vxorps %xmm5, %xmm5, %xmm5
+; AVX-64-NEXT: jb .LBB3_4
+; AVX-64-NEXT: # %bb.3:
+; AVX-64-NEXT: vmovaps %xmm1, %xmm5
+; AVX-64-NEXT: .LBB3_4:
+; AVX-64-NEXT: vmovq %rax, %xmm3
+; AVX-64-NEXT: vsubss %xmm5, %xmm4, %xmm4
+; AVX-64-NEXT: vcvttss2si %xmm4, %rax
+; AVX-64-NEXT: setae %cl
+; AVX-64-NEXT: movzbl %cl, %ecx
+; AVX-64-NEXT: shlq $63, %rcx
; AVX-64-NEXT: xorq %rax, %rcx
-; AVX-64-NEXT: vmovq %rcx, %xmm3
+; AVX-64-NEXT: vmovq %rcx, %xmm4
+; AVX-64-NEXT: vcomiss %xmm1, %xmm0
+; AVX-64-NEXT: vxorps %xmm5, %xmm5, %xmm5
+; AVX-64-NEXT: jb .LBB3_6
+; AVX-64-NEXT: # %bb.5:
+; AVX-64-NEXT: vmovaps %xmm1, %xmm5
+; AVX-64-NEXT: .LBB3_6:
+; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
+; AVX-64-NEXT: vsubss %xmm5, %xmm0, %xmm4
+; AVX-64-NEXT: vcvttss2si %xmm4, %rax
+; AVX-64-NEXT: setae %cl
+; AVX-64-NEXT: movzbl %cl, %ecx
+; AVX-64-NEXT: shlq $63, %rcx
+; AVX-64-NEXT: xorq %rax, %rcx
+; AVX-64-NEXT: vmovq %rcx, %xmm4
; AVX-64-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; AVX-64-NEXT: xorl %eax, %eax
-; AVX-64-NEXT: vucomiss %xmm1, %xmm0
-; AVX-64-NEXT: setae %al
-; AVX-64-NEXT: shlq $63, %rax
-; AVX-64-NEXT: vcmpltss %xmm1, %xmm0, %xmm4
-; AVX-64-NEXT: vandnps %xmm1, %xmm4, %xmm1
-; AVX-64-NEXT: vsubss %xmm1, %xmm0, %xmm0
-; AVX-64-NEXT: vcvttss2si %xmm0, %rcx
+; AVX-64-NEXT: vcomiss %xmm1, %xmm0
+; AVX-64-NEXT: jb .LBB3_8
+; AVX-64-NEXT: # %bb.7:
+; AVX-64-NEXT: vmovaps %xmm1, %xmm2
+; AVX-64-NEXT: .LBB3_8:
+; AVX-64-NEXT: vsubss %xmm2, %xmm0, %xmm0
+; AVX-64-NEXT: vcvttss2si %xmm0, %rax
+; AVX-64-NEXT: setae %cl
+; AVX-64-NEXT: movzbl %cl, %ecx
+; AVX-64-NEXT: shlq $63, %rcx
; AVX-64-NEXT: xorq %rax, %rcx
; AVX-64-NEXT: vmovq %rcx, %xmm0
-; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm3[0],xmm0[0]
-; AVX-64-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm4[0],xmm0[0]
+; AVX-64-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX-64-NEXT: retq
;
; AVX512VL-32-LABEL: strict_vector_fptoui_v4f32_to_v4i64:
@@ -670,7 +694,7 @@ define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {
; AVX512VL-32-NEXT: .cfi_offset %ebx, -12
; AVX512VL-32-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
; AVX512VL-32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; AVX512VL-32-NEXT: vucomiss %xmm1, %xmm2
+; AVX512VL-32-NEXT: vcomiss %xmm1, %xmm2
; AVX512VL-32-NEXT: setb %cl
; AVX512VL-32-NEXT: kmovw %ecx, %k1
; AVX512VL-32-NEXT: vxorps %xmm3, %xmm3, %xmm3
@@ -687,7 +711,7 @@ define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {
; AVX512VL-32-NEXT: movl %eax, %esi
; AVX512VL-32-NEXT: vpermilps {{.*#+}} xmm2 = xmm0[3,1,2,3]
; AVX512VL-32-NEXT: xorl %ecx, %ecx
-; AVX512VL-32-NEXT: vucomiss %xmm1, %xmm2
+; AVX512VL-32-NEXT: vcomiss %xmm1, %xmm2
; AVX512VL-32-NEXT: setb %dl
; AVX512VL-32-NEXT: kmovw %edx, %k1
; AVX512VL-32-NEXT: vmovaps %xmm1, %xmm4
@@ -701,7 +725,7 @@ define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {
; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %ecx
; AVX512VL-32-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
; AVX512VL-32-NEXT: xorl %edx, %edx
-; AVX512VL-32-NEXT: vucomiss %xmm1, %xmm2
+; AVX512VL-32-NEXT: vcomiss %xmm1, %xmm2
; AVX512VL-32-NEXT: setb %bl
; AVX512VL-32-NEXT: kmovw %ebx, %k1
; AVX512VL-32-NEXT: vmovaps %xmm1, %xmm4
@@ -714,7 +738,7 @@ define <4 x i64> @strict_vector_fptoui_v4f32_to_v4i64(<4 x float> %a) #0 {
; AVX512VL-32-NEXT: shll $31, %edx
; AVX512VL-32-NEXT: xorl {{[0-9]+}}(%esp), %edx
; AVX512VL-32-NEXT: xorl %ebx, %ebx
-; AVX512VL-32-NEXT: vucomiss %xmm1, %xmm0
+; AVX512VL-32-NEXT: vcomiss %xmm1, %xmm0
; AVX512VL-32-NEXT: setb %al
; AVX512VL-32-NEXT: kmovw %eax, %k1
; AVX512VL-32-NEXT: vmovss %xmm3, %xmm1, %xmm1 {%k1}
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