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-rw-r--r--llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll44
1 files changed, 22 insertions, 22 deletions
diff --git a/llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll
index 0111de2f521..5bf36a51c76 100644
--- a/llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll
@@ -6,12 +6,12 @@
define <2 x double> @test_mm_addsub_pd(<2 x double> %a0, <2 x double> %a1) {
; X32-LABEL: test_mm_addsub_pd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: addsubpd %xmm1, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_addsub_pd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: addsubpd %xmm1, %xmm0
; X64-NEXT: retq
%res = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1)
@@ -21,12 +21,12 @@ declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwi
define <4 x float> @test_mm_addsub_ps(<4 x float> %a0, <4 x float> %a1) {
; X32-LABEL: test_mm_addsub_ps:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: addsubps %xmm1, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_addsub_ps:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: addsubps %xmm1, %xmm0
; X64-NEXT: retq
%res = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1)
@@ -36,12 +36,12 @@ declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind
define <2 x double> @test_mm_hadd_pd(<2 x double> %a0, <2 x double> %a1) {
; X32-LABEL: test_mm_hadd_pd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: haddpd %xmm1, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_hadd_pd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: haddpd %xmm1, %xmm0
; X64-NEXT: retq
%res = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1)
@@ -51,12 +51,12 @@ declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind
define <4 x float> @test_mm_hadd_ps(<4 x float> %a0, <4 x float> %a1) {
; X32-LABEL: test_mm_hadd_ps:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: haddps %xmm1, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_hadd_ps:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: haddps %xmm1, %xmm0
; X64-NEXT: retq
%res = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1)
@@ -66,12 +66,12 @@ declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind re
define <2 x double> @test_mm_hsub_pd(<2 x double> %a0, <2 x double> %a1) {
; X32-LABEL: test_mm_hsub_pd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: hsubpd %xmm1, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_hsub_pd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: hsubpd %xmm1, %xmm0
; X64-NEXT: retq
%res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1)
@@ -81,12 +81,12 @@ declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind
define <4 x float> @test_mm_hsub_ps(<4 x float> %a0, <4 x float> %a1) {
; X32-LABEL: test_mm_hsub_ps:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: hsubps %xmm1, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_hsub_ps:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: hsubps %xmm1, %xmm0
; X64-NEXT: retq
%res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1)
@@ -96,13 +96,13 @@ declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind re
define <2 x i64> @test_mm_lddqu_si128(<2 x i64>* %a0) {
; X32-LABEL: test_mm_lddqu_si128:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: lddqu (%eax), %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_lddqu_si128:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: lddqu (%rdi), %xmm0
; X64-NEXT: retq
%bc = bitcast <2 x i64>* %a0 to i8*
@@ -114,13 +114,13 @@ declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly
define <2 x double> @test_mm_loaddup_pd(double* %a0) {
; X32-LABEL: test_mm_loaddup_pd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
; X32-NEXT: retl
;
; X64-LABEL: test_mm_loaddup_pd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
; X64-NEXT: retq
%ld = load double, double* %a0
@@ -131,12 +131,12 @@ define <2 x double> @test_mm_loaddup_pd(double* %a0) {
define <2 x double> @test_mm_movedup_pd(<2 x double> %a0) {
; X32-LABEL: test_mm_movedup_pd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
; X32-NEXT: retl
;
; X64-LABEL: test_mm_movedup_pd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
; X64-NEXT: retq
%res = shufflevector <2 x double> %a0, <2 x double> %a0, <2 x i32> zeroinitializer
@@ -145,12 +145,12 @@ define <2 x double> @test_mm_movedup_pd(<2 x double> %a0) {
define <4 x float> @test_mm_movehdup_ps(<4 x float> %a0) {
; X32-LABEL: test_mm_movehdup_ps:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; X32-NEXT: retl
;
; X64-LABEL: test_mm_movehdup_ps:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; X64-NEXT: retq
%res = shufflevector <4 x float> %a0, <4 x float> %a0, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
@@ -159,12 +159,12 @@ define <4 x float> @test_mm_movehdup_ps(<4 x float> %a0) {
define <4 x float> @test_mm_moveldup_ps(<4 x float> %a0) {
; X32-LABEL: test_mm_moveldup_ps:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
; X32-NEXT: retl
;
; X64-LABEL: test_mm_moveldup_ps:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
; X64-NEXT: retq
%res = shufflevector <4 x float> %a0, <4 x float> %a0, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
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