summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/select_const.ll
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/X86/select_const.ll')
-rw-r--r--llvm/test/CodeGen/X86/select_const.ll84
1 files changed, 42 insertions, 42 deletions
diff --git a/llvm/test/CodeGen/X86/select_const.ll b/llvm/test/CodeGen/X86/select_const.ll
index 264cc8175b7..ee74986ab5d 100644
--- a/llvm/test/CodeGen/X86/select_const.ll
+++ b/llvm/test/CodeGen/X86/select_const.ll
@@ -8,7 +8,7 @@
define i32 @select_0_or_1(i1 %cond) {
; CHECK-LABEL: select_0_or_1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: notb %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: andl $1, %eax
@@ -19,7 +19,7 @@ define i32 @select_0_or_1(i1 %cond) {
define i32 @select_0_or_1_zeroext(i1 zeroext %cond) {
; CHECK-LABEL: select_0_or_1_zeroext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorb $1, %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: retq
@@ -29,7 +29,7 @@ define i32 @select_0_or_1_zeroext(i1 zeroext %cond) {
define i32 @select_0_or_1_signext(i1 signext %cond) {
; CHECK-LABEL: select_0_or_1_signext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: notb %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: andl $1, %eax
@@ -42,7 +42,7 @@ define i32 @select_0_or_1_signext(i1 signext %cond) {
define i32 @select_1_or_0(i1 %cond) {
; CHECK-LABEL: select_1_or_0:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -52,7 +52,7 @@ define i32 @select_1_or_0(i1 %cond) {
define i32 @select_1_or_0_zeroext(i1 zeroext %cond) {
; CHECK-LABEL: select_1_or_0_zeroext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
%sel = select i1 %cond, i32 1, i32 0
@@ -61,7 +61,7 @@ define i32 @select_1_or_0_zeroext(i1 zeroext %cond) {
define i32 @select_1_or_0_signext(i1 signext %cond) {
; CHECK-LABEL: select_1_or_0_signext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -73,7 +73,7 @@ define i32 @select_1_or_0_signext(i1 signext %cond) {
define i32 @select_0_or_neg1(i1 %cond) {
; CHECK-LABEL: select_0_or_neg1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: leal -1(%rdi), %eax
@@ -84,7 +84,7 @@ define i32 @select_0_or_neg1(i1 %cond) {
define i32 @select_0_or_neg1_zeroext(i1 zeroext %cond) {
; CHECK-LABEL: select_0_or_neg1_zeroext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal -1(%rdi), %eax
; CHECK-NEXT: retq
@@ -94,7 +94,7 @@ define i32 @select_0_or_neg1_zeroext(i1 zeroext %cond) {
define i32 @select_0_or_neg1_signext(i1 signext %cond) {
; CHECK-LABEL: select_0_or_neg1_signext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: notl %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -106,7 +106,7 @@ define i32 @select_0_or_neg1_signext(i1 signext %cond) {
define i32 @select_neg1_or_0(i1 %cond) {
; CHECK-LABEL: select_neg1_or_0:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: negl %edi
; CHECK-NEXT: movl %edi, %eax
@@ -117,7 +117,7 @@ define i32 @select_neg1_or_0(i1 %cond) {
define i32 @select_neg1_or_0_zeroext(i1 zeroext %cond) {
; CHECK-LABEL: select_neg1_or_0_zeroext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: negl %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -127,7 +127,7 @@ define i32 @select_neg1_or_0_zeroext(i1 zeroext %cond) {
define i32 @select_neg1_or_0_signext(i1 signext %cond) {
; CHECK-LABEL: select_neg1_or_0_signext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
%sel = select i1 %cond, i32 -1, i32 0
@@ -138,7 +138,7 @@ define i32 @select_neg1_or_0_signext(i1 signext %cond) {
define i32 @select_Cplus1_C(i1 %cond) {
; CHECK-LABEL: select_Cplus1_C:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: leal 41(%rdi), %eax
@@ -149,7 +149,7 @@ define i32 @select_Cplus1_C(i1 %cond) {
define i32 @select_Cplus1_C_zeroext(i1 zeroext %cond) {
; CHECK-LABEL: select_Cplus1_C_zeroext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal 41(%rdi), %eax
; CHECK-NEXT: retq
@@ -159,7 +159,7 @@ define i32 @select_Cplus1_C_zeroext(i1 zeroext %cond) {
define i32 @select_Cplus1_C_signext(i1 signext %cond) {
; CHECK-LABEL: select_Cplus1_C_signext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $41, %eax
; CHECK-NEXT: subl %edi, %eax
; CHECK-NEXT: retq
@@ -171,7 +171,7 @@ define i32 @select_Cplus1_C_signext(i1 signext %cond) {
define i32 @select_C_Cplus1(i1 %cond) {
; CHECK-LABEL: select_C_Cplus1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: subl %edi, %eax
@@ -182,7 +182,7 @@ define i32 @select_C_Cplus1(i1 %cond) {
define i32 @select_C_Cplus1_zeroext(i1 zeroext %cond) {
; CHECK-LABEL: select_C_Cplus1_zeroext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: subl %edi, %eax
; CHECK-NEXT: retq
@@ -192,7 +192,7 @@ define i32 @select_C_Cplus1_zeroext(i1 zeroext %cond) {
define i32 @select_C_Cplus1_signext(i1 signext %cond) {
; CHECK-LABEL: select_C_Cplus1_signext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: subl %edi, %eax
@@ -206,7 +206,7 @@ define i32 @select_C_Cplus1_signext(i1 signext %cond) {
define i32 @select_lea_2(i1 zeroext %cond) {
; CHECK-LABEL: select_lea_2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorb $1, %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: leal -1(%rax,%rax), %eax
@@ -217,7 +217,7 @@ define i32 @select_lea_2(i1 zeroext %cond) {
define i64 @select_lea_3(i1 zeroext %cond) {
; CHECK-LABEL: select_lea_3:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorb $1, %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: leaq -2(%rax,%rax,2), %rax
@@ -228,7 +228,7 @@ define i64 @select_lea_3(i1 zeroext %cond) {
define i32 @select_lea_5(i1 zeroext %cond) {
; CHECK-LABEL: select_lea_5:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorb $1, %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: leal -2(%rax,%rax,4), %eax
@@ -239,7 +239,7 @@ define i32 @select_lea_5(i1 zeroext %cond) {
define i64 @select_lea_9(i1 zeroext %cond) {
; CHECK-LABEL: select_lea_9:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorb $1, %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: leaq -7(%rax,%rax,8), %rax
@@ -252,7 +252,7 @@ define i64 @select_lea_9(i1 zeroext %cond) {
define i64 @sel_1_2(i64 %x, i64 %y) {
; CHECK-LABEL: sel_1_2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpq $42, %rdi
; CHECK-NEXT: sbbq $0, %rsi
; CHECK-NEXT: leaq 2(%rsi), %rax
@@ -267,7 +267,7 @@ define i64 @sel_1_2(i64 %x, i64 %y) {
define i8 @sel_1_neg1(i32 %x) {
; CHECK-LABEL: sel_1_neg1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpl $42, %edi
; CHECK-NEXT: setg %al
; CHECK-NEXT: shlb $2, %al
@@ -282,7 +282,7 @@ define i8 @sel_1_neg1(i32 %x) {
define i16 @sel_neg1_1(i32 %x) {
; CHECK-LABEL: sel_neg1_1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $43, %edi
; CHECK-NEXT: setl %al
@@ -298,7 +298,7 @@ define i16 @sel_neg1_1(i32 %x) {
define i32 @sel_1_neg1_32(i32 %x) {
; CHECK-LABEL: sel_1_neg1_32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $42, %edi
; CHECK-NEXT: setg %al
@@ -311,7 +311,7 @@ define i32 @sel_1_neg1_32(i32 %x) {
define i32 @sel_neg1_1_32(i32 %x) {
; CHECK-LABEL: sel_neg1_1_32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $43, %edi
; CHECK-NEXT: setl %al
@@ -328,7 +328,7 @@ define i32 @sel_neg1_1_32(i32 %x) {
define i8 @select_pow2_diff(i1 zeroext %cond) {
; CHECK-LABEL: select_pow2_diff:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: shlb $4, %dil
; CHECK-NEXT: orb $3, %dil
; CHECK-NEXT: movl %edi, %eax
@@ -339,7 +339,7 @@ define i8 @select_pow2_diff(i1 zeroext %cond) {
define i16 @select_pow2_diff_invert(i1 zeroext %cond) {
; CHECK-LABEL: select_pow2_diff_invert:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorb $1, %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: shll $6, %eax
@@ -352,7 +352,7 @@ define i16 @select_pow2_diff_invert(i1 zeroext %cond) {
define i32 @select_pow2_diff_neg(i1 zeroext %cond) {
; CHECK-LABEL: select_pow2_diff_neg:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: shlb $4, %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orl $-25, %eax
@@ -363,7 +363,7 @@ define i32 @select_pow2_diff_neg(i1 zeroext %cond) {
define i64 @select_pow2_diff_neg_invert(i1 zeroext %cond) {
; CHECK-LABEL: select_pow2_diff_neg_invert:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorb $1, %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: shlq $7, %rax
@@ -377,11 +377,11 @@ define i64 @select_pow2_diff_neg_invert(i1 zeroext %cond) {
define i8 @sel_67_neg125(i32 %x) {
; CHECK-LABEL: sel_67_neg125:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpl $42, %edi
; CHECK-NEXT: movb $67, %al
; CHECK-NEXT: jg .LBB31_2
-; CHECK-NEXT: # BB#1:
+; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: movb $-125, %al
; CHECK-NEXT: .LBB31_2:
; CHECK-NEXT: retq
@@ -396,7 +396,7 @@ define i8 @sel_67_neg125(i32 %x) {
define i32 @select_C1_C2(i1 %cond) {
; CHECK-LABEL: select_C1_C2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: movl $421, %ecx # imm = 0x1A5
; CHECK-NEXT: movl $42, %eax
@@ -408,7 +408,7 @@ define i32 @select_C1_C2(i1 %cond) {
define i32 @select_C1_C2_zeroext(i1 zeroext %cond) {
; CHECK-LABEL: select_C1_C2_zeroext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: movl $421, %ecx # imm = 0x1A5
; CHECK-NEXT: movl $42, %eax
@@ -420,7 +420,7 @@ define i32 @select_C1_C2_zeroext(i1 zeroext %cond) {
define i32 @select_C1_C2_signext(i1 signext %cond) {
; CHECK-LABEL: select_C1_C2_signext:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: movl $421, %ecx # imm = 0x1A5
; CHECK-NEXT: movl $42, %eax
@@ -434,7 +434,7 @@ define i32 @select_C1_C2_signext(i1 signext %cond) {
define i64 @select_2_or_inc(i64 %x) {
; CHECK-LABEL: select_2_or_inc:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: leaq 1(%rdi), %rax
; CHECK-NEXT: cmpq $2, %rdi
; CHECK-NEXT: cmoveq %rdi, %rax
@@ -447,10 +447,10 @@ define i64 @select_2_or_inc(i64 %x) {
define <4 x i32> @sel_constants_add_constant_vec(i1 %cond) {
; CHECK-LABEL: sel_constants_add_constant_vec:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: jne .LBB36_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [12,13,14,15]
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB36_1:
@@ -463,10 +463,10 @@ define <4 x i32> @sel_constants_add_constant_vec(i1 %cond) {
define <2 x double> @sel_constants_fmul_constant_vec(i1 %cond) {
; CHECK-LABEL: sel_constants_fmul_constant_vec:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: jne .LBB37_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1.188300e+02,3.454000e+01]
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB37_1:
@@ -482,7 +482,7 @@ define <2 x double> @sel_constants_fmul_constant_vec(i1 %cond) {
define i64 @opaque_constant(i1 %cond, i64 %x) {
; CHECK-LABEL: opaque_constant:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: movl $23, %ecx
; CHECK-NEXT: movq $-4, %rax
OpenPOWER on IntegriCloud