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-rw-r--r--llvm/test/CodeGen/X86/patchable-prologue.ll24
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/patchable-prologue.ll b/llvm/test/CodeGen/X86/patchable-prologue.ll
index b04dc86a5d6..c8daff33181 100644
--- a/llvm/test/CodeGen/X86/patchable-prologue.ll
+++ b/llvm/test/CodeGen/X86/patchable-prologue.ll
@@ -41,3 +41,27 @@ define void @f3() "patchable-function"="prologue-short-redirect" optsize {
; CHECK-ALIGN: _f3:
ret void
}
+
+; This testcase happens to produce a KILL instruction at the beginning of the
+; first basic block. In this case the 2nd instruction should be turned into a
+; patchable one.
+; CHECK-LABEL: f4:
+; CHECK-NEXT: 8b 0c 37 movl (%rdi,%rsi), %ecx
+define i32 @f4(i8* %arg1, i64 %arg2, i32 %arg3) "patchable-function"="prologue-short-redirect" {
+bb:
+ %tmp10 = getelementptr i8, i8* %arg1, i64 %arg2
+ %tmp11 = bitcast i8* %tmp10 to i32*
+ %tmp12 = load i32, i32* %tmp11, align 4
+ fence acquire
+ %tmp13 = add i32 %tmp12, %arg3
+ %tmp14 = cmpxchg i32* %tmp11, i32 %tmp12, i32 %tmp13 seq_cst monotonic
+ %tmp15 = extractvalue { i32, i1 } %tmp14, 1
+ br i1 %tmp15, label %bb21, label %bb16
+
+bb16:
+ br label %bb21
+
+bb21:
+ %tmp22 = phi i32 [ %tmp12, %bb ], [ %arg3, %bb16 ]
+ ret i32 %tmp22
+}
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