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-rw-r--r--llvm/test/CodeGen/X86/half.ll15
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/half.ll b/llvm/test/CodeGen/X86/half.ll
index 531891f9cae..43e6aa86993 100644
--- a/llvm/test/CodeGen/X86/half.ll
+++ b/llvm/test/CodeGen/X86/half.ll
@@ -2,6 +2,8 @@
; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c -asm-verbose=false \
; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-F16C
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr +sse2 -asm-verbose=false \
+; RUN: | FileCheck %s -check-prefix=CHECK-I686
define void @test_load_store(half* %in, half* %out) {
; CHECK-LABEL: test_load_store:
@@ -260,4 +262,17 @@ define void @test_trunc64_vec4(<4 x double> %a, <4 x half>* %p) {
ret void
}
+declare float @test_floatret();
+
+; On i686, if SSE2 is available, the return value from test_floatret is loaded
+; to f80 and then rounded to f32. The DAG combiner should not combine this
+; fp_round and the subsequent fptrunc from float to half.
+define half @test_f80trunc_nodagcombine() #0 {
+; CHECK-LABEL: test_f80trunc_nodagcombine:
+; CHECK-I686-NOT: calll __truncxfhf2
+ %1 = call float @test_floatret()
+ %2 = fptrunc float %1 to half
+ ret half %2
+}
+
attributes #0 = { nounwind }
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