1 files changed, 136 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/combine-srem.ll b/llvm/test/CodeGen/X86/combine-srem.ll
index ef338b37109..8bb0ec95d00 100644
--- a/llvm/test/CodeGen/X86/combine-srem.ll
+++ b/llvm/test/CodeGen/X86/combine-srem.ll
@@ -432,3 +432,139 @@ define <4 x i1> @boolvec_srem(<4 x i1> %x, <4 x i1> %y) {
   %r = srem <4 x i1> %x, %y
   ret <4 x i1> %r
 }
+
+define i32 @combine_srem_two(i32 %x) {
+; CHECK-LABEL: combine_srem_two:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movl %edi, %ecx
+; CHECK-NEXT:    shrl $31, %ecx
+; CHECK-NEXT:    addl %edi, %ecx
+; CHECK-NEXT:    andl $-2, %ecx
+; CHECK-NEXT:    subl %ecx, %eax
+; CHECK-NEXT:    retq
+  %1 = srem i32 %x, 2
+  ret i32 %1
+}
+
+define i32 @combine_srem_negtwo(i32 %x) {
+; CHECK-LABEL: combine_srem_negtwo:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movl %edi, %ecx
+; CHECK-NEXT:    shrl $31, %ecx
+; CHECK-NEXT:    addl %edi, %ecx
+; CHECK-NEXT:    andl $-2, %ecx
+; CHECK-NEXT:    subl %ecx, %eax
+; CHECK-NEXT:    retq
+  %1 = srem i32 %x, -2
+  ret i32 %1
+}
+
+define i8 @combine_i8_srem_negpow2(i8 %x) {
+; CHECK-LABEL: combine_i8_srem_negpow2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movl %eax, %ecx
+; CHECK-NEXT:    sarb $7, %cl
+; CHECK-NEXT:    shrb $2, %cl
+; CHECK-NEXT:    addb %al, %cl
+; CHECK-NEXT:    andb $-64, %cl
+; CHECK-NEXT:    subb %cl, %al
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retq
+  %1 = srem i8 %x, -64
+  ret i8 %1
+}
+
+define i16 @combine_i16_srem_pow2(i16 %x) {
+; CHECK-LABEL: combine_i16_srem_pow2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movswl %ax, %ecx
+; CHECK-NEXT:    shrl $27, %ecx
+; CHECK-NEXT:    andl $15, %ecx
+; CHECK-NEXT:    addl %edi, %ecx
+; CHECK-NEXT:    andl $-16, %ecx
+; CHECK-NEXT:    subl %ecx, %eax
+; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT:    retq
+  %1 = srem i16 %x, 16
+  ret i16 %1
+}
+
+define i16 @combine_i16_srem_negpow2(i16 %x) {
+; CHECK-LABEL: combine_i16_srem_negpow2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movswl %ax, %ecx
+; CHECK-NEXT:    shrl $23, %ecx
+; CHECK-NEXT:    movzbl %cl, %ecx
+; CHECK-NEXT:    addl %edi, %ecx
+; CHECK-NEXT:    andl $-256, %ecx
+; CHECK-NEXT:    subl %ecx, %eax
+; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT:    retq
+  %1 = srem i16 %x, -256
+  ret i16 %1
+}
+
+define i32 @combine_srem_pow2(i32 %x) {
+; CHECK-LABEL: combine_srem_pow2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movl %edi, %ecx
+; CHECK-NEXT:    sarl $31, %ecx
+; CHECK-NEXT:    shrl $28, %ecx
+; CHECK-NEXT:    addl %edi, %ecx
+; CHECK-NEXT:    andl $-16, %ecx
+; CHECK-NEXT:    subl %ecx, %eax
+; CHECK-NEXT:    retq
+  %1 = srem i32 %x, 16
+  ret i32 %1
+}
+
+define i32 @combine_srem_negpow2(i32 %x) {
+; CHECK-LABEL: combine_srem_negpow2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movl %edi, %ecx
+; CHECK-NEXT:    sarl $31, %ecx
+; CHECK-NEXT:    shrl $24, %ecx
+; CHECK-NEXT:    addl %edi, %ecx
+; CHECK-NEXT:    andl $-256, %ecx
+; CHECK-NEXT:    subl %ecx, %eax
+; CHECK-NEXT:    retq
+  %1 = srem i32 %x, -256
+  ret i32 %1
+}
+
+define i64 @combine_i64_srem_pow2(i64 %x) {
+; CHECK-LABEL: combine_i64_srem_pow2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    movq %rdi, %rcx
+; CHECK-NEXT:    sarq $63, %rcx
+; CHECK-NEXT:    shrq $60, %rcx
+; CHECK-NEXT:    addq %rdi, %rcx
+; CHECK-NEXT:    andq $-16, %rcx
+; CHECK-NEXT:    subq %rcx, %rax
+; CHECK-NEXT:    retq
+  %1 = srem i64 %x, 16
+  ret i64 %1
+}
+
+define i64 @combine_i64_srem_negpow2(i64 %x) {
+; CHECK-LABEL: combine_i64_srem_negpow2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    movq %rdi, %rcx
+; CHECK-NEXT:    sarq $63, %rcx
+; CHECK-NEXT:    shrq $56, %rcx
+; CHECK-NEXT:    addq %rdi, %rcx
+; CHECK-NEXT:    andq $-256, %rcx
+; CHECK-NEXT:    subq %rcx, %rax
+; CHECK-NEXT:    retq
+  %1 = srem i64 %x, -256
+  ret i64 %1
+}