diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/combine-srem.ll')
-rw-r--r-- | llvm/test/CodeGen/X86/combine-srem.ll | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/combine-srem.ll b/llvm/test/CodeGen/X86/combine-srem.ll index 75ee77582ad..7af33fea6db 100644 --- a/llvm/test/CodeGen/X86/combine-srem.ll +++ b/llvm/test/CodeGen/X86/combine-srem.ll @@ -458,3 +458,83 @@ define i32 @ossfuzz6883() { %B6 = and i32 %B16, %B10 ret i32 %B6 } + +define i1 @bool_srem(i1 %x, i1 %y) { +; CHECK-LABEL: bool_srem: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: andb $1, %al +; CHECK-NEXT: negb %al +; CHECK-NEXT: # kill: def $al killed $al killed $eax +; CHECK-NEXT: cbtw +; CHECK-NEXT: andb $1, %sil +; CHECK-NEXT: negb %sil +; CHECK-NEXT: idivb %sil +; CHECK-NEXT: movsbl %ah, %eax +; CHECK-NEXT: # kill: def $al killed $al killed $eax +; CHECK-NEXT: retq + %r = srem i1 %x, %y + ret i1 %r +} +define <4 x i1> @boolvec_srem(<4 x i1> %x, <4 x i1> %y) { +; SSE-LABEL: boolvec_srem: +; SSE: # %bb.0: +; SSE-NEXT: pslld $31, %xmm1 +; SSE-NEXT: psrad $31, %xmm1 +; SSE-NEXT: pslld $31, %xmm0 +; SSE-NEXT: psrad $31, %xmm0 +; SSE-NEXT: pextrd $1, %xmm0, %eax +; SSE-NEXT: pextrd $1, %xmm1, %ecx +; SSE-NEXT: cltd +; SSE-NEXT: idivl %ecx +; SSE-NEXT: movl %edx, %ecx +; SSE-NEXT: movd %xmm0, %eax +; SSE-NEXT: movd %xmm1, %esi +; SSE-NEXT: cltd +; SSE-NEXT: idivl %esi +; SSE-NEXT: movd %edx, %xmm2 +; SSE-NEXT: pinsrd $1, %ecx, %xmm2 +; SSE-NEXT: pextrd $2, %xmm0, %eax +; SSE-NEXT: pextrd $2, %xmm1, %ecx +; SSE-NEXT: cltd +; SSE-NEXT: idivl %ecx +; SSE-NEXT: pinsrd $2, %edx, %xmm2 +; SSE-NEXT: pextrd $3, %xmm0, %eax +; SSE-NEXT: pextrd $3, %xmm1, %ecx +; SSE-NEXT: cltd +; SSE-NEXT: idivl %ecx +; SSE-NEXT: pinsrd $3, %edx, %xmm2 +; SSE-NEXT: movdqa %xmm2, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: boolvec_srem: +; AVX: # %bb.0: +; AVX-NEXT: vpslld $31, %xmm1, %xmm1 +; AVX-NEXT: vpsrad $31, %xmm1, %xmm1 +; AVX-NEXT: vpslld $31, %xmm0, %xmm0 +; AVX-NEXT: vpsrad $31, %xmm0, %xmm0 +; AVX-NEXT: vpextrd $1, %xmm0, %eax +; AVX-NEXT: vpextrd $1, %xmm1, %ecx +; AVX-NEXT: cltd +; AVX-NEXT: idivl %ecx +; AVX-NEXT: movl %edx, %ecx +; AVX-NEXT: vmovd %xmm0, %eax +; AVX-NEXT: vmovd %xmm1, %esi +; AVX-NEXT: cltd +; AVX-NEXT: idivl %esi +; AVX-NEXT: vmovd %edx, %xmm2 +; AVX-NEXT: vpinsrd $1, %ecx, %xmm2, %xmm2 +; AVX-NEXT: vpextrd $2, %xmm0, %eax +; AVX-NEXT: vpextrd $2, %xmm1, %ecx +; AVX-NEXT: cltd +; AVX-NEXT: idivl %ecx +; AVX-NEXT: vpinsrd $2, %edx, %xmm2, %xmm2 +; AVX-NEXT: vpextrd $3, %xmm0, %eax +; AVX-NEXT: vpextrd $3, %xmm1, %ecx +; AVX-NEXT: cltd +; AVX-NEXT: idivl %ecx +; AVX-NEXT: vpinsrd $3, %edx, %xmm2, %xmm0 +; AVX-NEXT: retq + %r = srem <4 x i1> %x, %y + ret <4 x i1> %r +} |