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Diffstat (limited to 'llvm/test/CodeGen/X86/clz.ll')
-rw-r--r--llvm/test/CodeGen/X86/clz.ll224
1 files changed, 112 insertions, 112 deletions
diff --git a/llvm/test/CodeGen/X86/clz.ll b/llvm/test/CodeGen/X86/clz.ll
index 4e479365fb8..5f58e79a94e 100644
--- a/llvm/test/CodeGen/X86/clz.ll
+++ b/llvm/test/CodeGen/X86/clz.ll
@@ -16,28 +16,28 @@ declare i64 @llvm.ctlz.i64(i64, i1)
define i8 @cttz_i8(i8 %x) {
; X32-LABEL: cttz_i8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: bsfl %eax, %eax
; X32-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X32-NEXT: retl
;
; X64-LABEL: cttz_i8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: bsfl %eax, %eax
; X64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X64-NEXT: retq
;
; X32-CLZ-LABEL: cttz_i8:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: tzcntl %eax, %eax
; X32-CLZ-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: cttz_i8:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: movzbl %dil, %eax
; X64-CLZ-NEXT: tzcntl %eax, %eax
; X64-CLZ-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -48,22 +48,22 @@ define i8 @cttz_i8(i8 %x) {
define i16 @cttz_i16(i16 %x) {
; X32-LABEL: cttz_i16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: bsfw {{[0-9]+}}(%esp), %ax
; X32-NEXT: retl
;
; X64-LABEL: cttz_i16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bsfw %di, %ax
; X64-NEXT: retq
;
; X32-CLZ-LABEL: cttz_i16:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: tzcntw {{[0-9]+}}(%esp), %ax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: cttz_i16:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: tzcntw %di, %ax
; X64-CLZ-NEXT: retq
%tmp = call i16 @llvm.cttz.i16( i16 %x, i1 true )
@@ -72,22 +72,22 @@ define i16 @cttz_i16(i16 %x) {
define i32 @cttz_i32(i32 %x) {
; X32-LABEL: cttz_i32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: bsfl {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: cttz_i32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bsfl %edi, %eax
; X64-NEXT: retq
;
; X32-CLZ-LABEL: cttz_i32:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: tzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: cttz_i32:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: tzcntl %edi, %eax
; X64-CLZ-NEXT: retq
%tmp = call i32 @llvm.cttz.i32( i32 %x, i1 true )
@@ -96,11 +96,11 @@ define i32 @cttz_i32(i32 %x) {
define i64 @cttz_i64(i64 %x) {
; X32-LABEL: cttz_i64:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: testl %eax, %eax
; X32-NEXT: jne .LBB3_1
-; X32-NEXT: # BB#2:
+; X32-NEXT: # %bb.2:
; X32-NEXT: bsfl {{[0-9]+}}(%esp), %eax
; X32-NEXT: addl $32, %eax
; X32-NEXT: xorl %edx, %edx
@@ -111,16 +111,16 @@ define i64 @cttz_i64(i64 %x) {
; X32-NEXT: retl
;
; X64-LABEL: cttz_i64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bsfq %rdi, %rax
; X64-NEXT: retq
;
; X32-CLZ-LABEL: cttz_i64:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: testl %eax, %eax
; X32-CLZ-NEXT: jne .LBB3_1
-; X32-CLZ-NEXT: # BB#2:
+; X32-CLZ-NEXT: # %bb.2:
; X32-CLZ-NEXT: tzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: addl $32, %eax
; X32-CLZ-NEXT: xorl %edx, %edx
@@ -131,7 +131,7 @@ define i64 @cttz_i64(i64 %x) {
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: cttz_i64:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: tzcntq %rdi, %rax
; X64-CLZ-NEXT: retq
%tmp = call i64 @llvm.cttz.i64( i64 %x, i1 true )
@@ -140,7 +140,7 @@ define i64 @cttz_i64(i64 %x) {
define i8 @ctlz_i8(i8 %x) {
; X32-LABEL: ctlz_i8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: bsrl %eax, %eax
; X32-NEXT: xorl $7, %eax
@@ -148,7 +148,7 @@ define i8 @ctlz_i8(i8 %x) {
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: bsrl %eax, %eax
; X64-NEXT: xorl $7, %eax
@@ -156,7 +156,7 @@ define i8 @ctlz_i8(i8 %x) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i8:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: lzcntl %eax, %eax
; X32-CLZ-NEXT: addl $-24, %eax
@@ -164,7 +164,7 @@ define i8 @ctlz_i8(i8 %x) {
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i8:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: movzbl %dil, %eax
; X64-CLZ-NEXT: lzcntl %eax, %eax
; X64-CLZ-NEXT: addl $-24, %eax
@@ -176,26 +176,26 @@ define i8 @ctlz_i8(i8 %x) {
define i16 @ctlz_i16(i16 %x) {
; X32-LABEL: ctlz_i16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: bsrw {{[0-9]+}}(%esp), %ax
; X32-NEXT: xorl $15, %eax
; X32-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bsrw %di, %ax
; X64-NEXT: xorl $15, %eax
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i16:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: lzcntw {{[0-9]+}}(%esp), %ax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i16:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: lzcntw %di, %ax
; X64-CLZ-NEXT: retq
%tmp2 = call i16 @llvm.ctlz.i16( i16 %x, i1 true )
@@ -204,24 +204,24 @@ define i16 @ctlz_i16(i16 %x) {
define i32 @ctlz_i32(i32 %x) {
; X32-LABEL: ctlz_i32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: bsrl {{[0-9]+}}(%esp), %eax
; X32-NEXT: xorl $31, %eax
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bsrl %edi, %eax
; X64-NEXT: xorl $31, %eax
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i32:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: lzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i32:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: lzcntl %edi, %eax
; X64-CLZ-NEXT: retq
%tmp = call i32 @llvm.ctlz.i32( i32 %x, i1 true )
@@ -230,11 +230,11 @@ define i32 @ctlz_i32(i32 %x) {
define i64 @ctlz_i64(i64 %x) {
; X32-LABEL: ctlz_i64:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: testl %eax, %eax
; X32-NEXT: jne .LBB7_1
-; X32-NEXT: # BB#2:
+; X32-NEXT: # %bb.2:
; X32-NEXT: bsrl {{[0-9]+}}(%esp), %eax
; X32-NEXT: xorl $31, %eax
; X32-NEXT: addl $32, %eax
@@ -247,17 +247,17 @@ define i64 @ctlz_i64(i64 %x) {
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bsrq %rdi, %rax
; X64-NEXT: xorq $63, %rax
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i64:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: testl %eax, %eax
; X32-CLZ-NEXT: jne .LBB7_1
-; X32-CLZ-NEXT: # BB#2:
+; X32-CLZ-NEXT: # %bb.2:
; X32-CLZ-NEXT: lzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: addl $32, %eax
; X32-CLZ-NEXT: xorl %edx, %edx
@@ -268,7 +268,7 @@ define i64 @ctlz_i64(i64 %x) {
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i64:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: lzcntq %rdi, %rax
; X64-CLZ-NEXT: retq
%tmp = call i64 @llvm.ctlz.i64( i64 %x, i1 true )
@@ -278,11 +278,11 @@ define i64 @ctlz_i64(i64 %x) {
; Generate a test and branch to handle zero inputs because bsr/bsf are very slow.
define i8 @ctlz_i8_zero_test(i8 %n) {
; X32-LABEL: ctlz_i8_zero_test:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: testb %al, %al
; X32-NEXT: je .LBB8_1
-; X32-NEXT: # BB#2: # %cond.false
+; X32-NEXT: # %bb.2: # %cond.false
; X32-NEXT: movzbl %al, %eax
; X32-NEXT: bsrl %eax, %eax
; X32-NEXT: xorl $7, %eax
@@ -294,10 +294,10 @@ define i8 @ctlz_i8_zero_test(i8 %n) {
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i8_zero_test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testb %dil, %dil
; X64-NEXT: je .LBB8_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: bsrl %eax, %eax
; X64-NEXT: xorl $7, %eax
@@ -309,7 +309,7 @@ define i8 @ctlz_i8_zero_test(i8 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i8_zero_test:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: lzcntl %eax, %eax
; X32-CLZ-NEXT: addl $-24, %eax
@@ -317,7 +317,7 @@ define i8 @ctlz_i8_zero_test(i8 %n) {
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i8_zero_test:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: movzbl %dil, %eax
; X64-CLZ-NEXT: lzcntl %eax, %eax
; X64-CLZ-NEXT: addl $-24, %eax
@@ -330,11 +330,11 @@ define i8 @ctlz_i8_zero_test(i8 %n) {
; Generate a test and branch to handle zero inputs because bsr/bsf are very slow.
define i16 @ctlz_i16_zero_test(i16 %n) {
; X32-LABEL: ctlz_i16_zero_test:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: testw %ax, %ax
; X32-NEXT: je .LBB9_1
-; X32-NEXT: # BB#2: # %cond.false
+; X32-NEXT: # %bb.2: # %cond.false
; X32-NEXT: bsrw %ax, %ax
; X32-NEXT: xorl $15, %eax
; X32-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -345,10 +345,10 @@ define i16 @ctlz_i16_zero_test(i16 %n) {
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i16_zero_test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testw %di, %di
; X64-NEXT: je .LBB9_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: bsrw %di, %ax
; X64-NEXT: xorl $15, %eax
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -359,12 +359,12 @@ define i16 @ctlz_i16_zero_test(i16 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i16_zero_test:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: lzcntw {{[0-9]+}}(%esp), %ax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i16_zero_test:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: lzcntw %di, %ax
; X64-CLZ-NEXT: retq
%tmp1 = call i16 @llvm.ctlz.i16(i16 %n, i1 false)
@@ -374,11 +374,11 @@ define i16 @ctlz_i16_zero_test(i16 %n) {
; Generate a test and branch to handle zero inputs because bsr/bsf are very slow.
define i32 @ctlz_i32_zero_test(i32 %n) {
; X32-LABEL: ctlz_i32_zero_test:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: testl %eax, %eax
; X32-NEXT: je .LBB10_1
-; X32-NEXT: # BB#2: # %cond.false
+; X32-NEXT: # %bb.2: # %cond.false
; X32-NEXT: bsrl %eax, %eax
; X32-NEXT: xorl $31, %eax
; X32-NEXT: retl
@@ -387,10 +387,10 @@ define i32 @ctlz_i32_zero_test(i32 %n) {
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i32_zero_test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testl %edi, %edi
; X64-NEXT: je .LBB10_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: bsrl %edi, %eax
; X64-NEXT: xorl $31, %eax
; X64-NEXT: retq
@@ -399,12 +399,12 @@ define i32 @ctlz_i32_zero_test(i32 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i32_zero_test:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: lzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i32_zero_test:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: lzcntl %edi, %eax
; X64-CLZ-NEXT: retq
%tmp1 = call i32 @llvm.ctlz.i32(i32 %n, i1 false)
@@ -414,17 +414,17 @@ define i32 @ctlz_i32_zero_test(i32 %n) {
; Generate a test and branch to handle zero inputs because bsr/bsf are very slow.
define i64 @ctlz_i64_zero_test(i64 %n) {
; X32-LABEL: ctlz_i64_zero_test:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: bsrl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl $63, %eax
; X32-NEXT: je .LBB11_2
-; X32-NEXT: # BB#1:
+; X32-NEXT: # %bb.1:
; X32-NEXT: movl %edx, %eax
; X32-NEXT: .LBB11_2:
; X32-NEXT: testl %ecx, %ecx
; X32-NEXT: jne .LBB11_3
-; X32-NEXT: # BB#4:
+; X32-NEXT: # %bb.4:
; X32-NEXT: xorl $31, %eax
; X32-NEXT: addl $32, %eax
; X32-NEXT: xorl %edx, %edx
@@ -436,10 +436,10 @@ define i64 @ctlz_i64_zero_test(i64 %n) {
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i64_zero_test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testq %rdi, %rdi
; X64-NEXT: je .LBB11_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: bsrq %rdi, %rax
; X64-NEXT: xorq $63, %rax
; X64-NEXT: retq
@@ -448,11 +448,11 @@ define i64 @ctlz_i64_zero_test(i64 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i64_zero_test:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: testl %eax, %eax
; X32-CLZ-NEXT: jne .LBB11_1
-; X32-CLZ-NEXT: # BB#2:
+; X32-CLZ-NEXT: # %bb.2:
; X32-CLZ-NEXT: lzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: addl $32, %eax
; X32-CLZ-NEXT: xorl %edx, %edx
@@ -463,7 +463,7 @@ define i64 @ctlz_i64_zero_test(i64 %n) {
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i64_zero_test:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: lzcntq %rdi, %rax
; X64-CLZ-NEXT: retq
%tmp1 = call i64 @llvm.ctlz.i64(i64 %n, i1 false)
@@ -473,11 +473,11 @@ define i64 @ctlz_i64_zero_test(i64 %n) {
; Generate a test and branch to handle zero inputs because bsr/bsf are very slow.
define i8 @cttz_i8_zero_test(i8 %n) {
; X32-LABEL: cttz_i8_zero_test:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: testb %al, %al
; X32-NEXT: je .LBB12_1
-; X32-NEXT: # BB#2: # %cond.false
+; X32-NEXT: # %bb.2: # %cond.false
; X32-NEXT: movzbl %al, %eax
; X32-NEXT: bsfl %eax, %eax
; X32-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -488,10 +488,10 @@ define i8 @cttz_i8_zero_test(i8 %n) {
; X32-NEXT: retl
;
; X64-LABEL: cttz_i8_zero_test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testb %dil, %dil
; X64-NEXT: je .LBB12_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: bsfl %eax, %eax
; X64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -502,7 +502,7 @@ define i8 @cttz_i8_zero_test(i8 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: cttz_i8_zero_test:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: orl $256, %eax # imm = 0x100
; X32-CLZ-NEXT: tzcntl %eax, %eax
@@ -510,7 +510,7 @@ define i8 @cttz_i8_zero_test(i8 %n) {
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: cttz_i8_zero_test:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: movzbl %dil, %eax
; X64-CLZ-NEXT: orl $256, %eax # imm = 0x100
; X64-CLZ-NEXT: tzcntl %eax, %eax
@@ -523,11 +523,11 @@ define i8 @cttz_i8_zero_test(i8 %n) {
; Generate a test and branch to handle zero inputs because bsr/bsf are very slow.
define i16 @cttz_i16_zero_test(i16 %n) {
; X32-LABEL: cttz_i16_zero_test:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: testw %ax, %ax
; X32-NEXT: je .LBB13_1
-; X32-NEXT: # BB#2: # %cond.false
+; X32-NEXT: # %bb.2: # %cond.false
; X32-NEXT: bsfw %ax, %ax
; X32-NEXT: retl
; X32-NEXT: .LBB13_1
@@ -535,10 +535,10 @@ define i16 @cttz_i16_zero_test(i16 %n) {
; X32-NEXT: retl
;
; X64-LABEL: cttz_i16_zero_test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testw %di, %di
; X64-NEXT: je .LBB13_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: bsfw %di, %ax
; X64-NEXT: retq
; X64-NEXT: .LBB13_1:
@@ -546,12 +546,12 @@ define i16 @cttz_i16_zero_test(i16 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: cttz_i16_zero_test:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: tzcntw {{[0-9]+}}(%esp), %ax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: cttz_i16_zero_test:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: tzcntw %di, %ax
; X64-CLZ-NEXT: retq
%tmp1 = call i16 @llvm.cttz.i16(i16 %n, i1 false)
@@ -561,11 +561,11 @@ define i16 @cttz_i16_zero_test(i16 %n) {
; Generate a test and branch to handle zero inputs because bsr/bsf are very slow.
define i32 @cttz_i32_zero_test(i32 %n) {
; X32-LABEL: cttz_i32_zero_test:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: testl %eax, %eax
; X32-NEXT: je .LBB14_1
-; X32-NEXT: # BB#2: # %cond.false
+; X32-NEXT: # %bb.2: # %cond.false
; X32-NEXT: bsfl %eax, %eax
; X32-NEXT: retl
; X32-NEXT: .LBB14_1
@@ -573,10 +573,10 @@ define i32 @cttz_i32_zero_test(i32 %n) {
; X32-NEXT: retl
;
; X64-LABEL: cttz_i32_zero_test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testl %edi, %edi
; X64-NEXT: je .LBB14_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: bsfl %edi, %eax
; X64-NEXT: retq
; X64-NEXT: .LBB14_1:
@@ -584,12 +584,12 @@ define i32 @cttz_i32_zero_test(i32 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: cttz_i32_zero_test:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: tzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: cttz_i32_zero_test:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: tzcntl %edi, %eax
; X64-CLZ-NEXT: retq
%tmp1 = call i32 @llvm.cttz.i32(i32 %n, i1 false)
@@ -599,17 +599,17 @@ define i32 @cttz_i32_zero_test(i32 %n) {
; Generate a test and branch to handle zero inputs because bsr/bsf are very slow.
define i64 @cttz_i64_zero_test(i64 %n) {
; X32-LABEL: cttz_i64_zero_test:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: bsfl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl $32, %eax
; X32-NEXT: je .LBB15_2
-; X32-NEXT: # BB#1:
+; X32-NEXT: # %bb.1:
; X32-NEXT: movl %edx, %eax
; X32-NEXT: .LBB15_2:
; X32-NEXT: testl %ecx, %ecx
; X32-NEXT: jne .LBB15_3
-; X32-NEXT: # BB#4:
+; X32-NEXT: # %bb.4:
; X32-NEXT: addl $32, %eax
; X32-NEXT: xorl %edx, %edx
; X32-NEXT: retl
@@ -619,10 +619,10 @@ define i64 @cttz_i64_zero_test(i64 %n) {
; X32-NEXT: retl
;
; X64-LABEL: cttz_i64_zero_test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testq %rdi, %rdi
; X64-NEXT: je .LBB15_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: bsfq %rdi, %rax
; X64-NEXT: retq
; X64-NEXT: .LBB15_1:
@@ -630,11 +630,11 @@ define i64 @cttz_i64_zero_test(i64 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: cttz_i64_zero_test:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: testl %eax, %eax
; X32-CLZ-NEXT: jne .LBB15_1
-; X32-CLZ-NEXT: # BB#2:
+; X32-CLZ-NEXT: # %bb.2:
; X32-CLZ-NEXT: tzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: addl $32, %eax
; X32-CLZ-NEXT: xorl %edx, %edx
@@ -645,7 +645,7 @@ define i64 @cttz_i64_zero_test(i64 %n) {
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: cttz_i64_zero_test:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: tzcntq %rdi, %rax
; X64-CLZ-NEXT: retq
%tmp1 = call i64 @llvm.cttz.i64(i64 %n, i1 false)
@@ -659,11 +659,11 @@ define i64 @cttz_i64_zero_test(i64 %n) {
; codegen doesn't know how to delete the movl and je.
define i32 @ctlz_i32_fold_cmov(i32 %n) {
; X32-LABEL: ctlz_i32_fold_cmov:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: orl $1, %eax
; X32-NEXT: je .LBB16_1
-; X32-NEXT: # BB#2: # %cond.false
+; X32-NEXT: # %bb.2: # %cond.false
; X32-NEXT: bsrl %eax, %eax
; X32-NEXT: xorl $31, %eax
; X32-NEXT: retl
@@ -672,10 +672,10 @@ define i32 @ctlz_i32_fold_cmov(i32 %n) {
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i32_fold_cmov:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: orl $1, %edi
; X64-NEXT: je .LBB16_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: bsrl %edi, %eax
; X64-NEXT: xorl $31, %eax
; X64-NEXT: retq
@@ -684,14 +684,14 @@ define i32 @ctlz_i32_fold_cmov(i32 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i32_fold_cmov:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: orl $1, %eax
; X32-CLZ-NEXT: lzcntl %eax, %eax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i32_fold_cmov:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: orl $1, %edi
; X64-CLZ-NEXT: lzcntl %edi, %eax
; X64-CLZ-NEXT: retq
@@ -705,23 +705,23 @@ define i32 @ctlz_i32_fold_cmov(i32 %n) {
; FIXME: We should probably select BSR instead of LZCNT in these circumstances.
define i32 @ctlz_bsr(i32 %n) {
; X32-LABEL: ctlz_bsr:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: bsrl {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: ctlz_bsr:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bsrl %edi, %eax
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_bsr:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: lzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: xorl $31, %eax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_bsr:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: lzcntl %edi, %eax
; X64-CLZ-NEXT: xorl $31, %eax
; X64-CLZ-NEXT: retq
@@ -735,11 +735,11 @@ define i32 @ctlz_bsr(i32 %n) {
; codegen doesn't know how to combine the $32 and $31 into $63.
define i32 @ctlz_bsr_zero_test(i32 %n) {
; X32-LABEL: ctlz_bsr_zero_test:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: testl %eax, %eax
; X32-NEXT: je .LBB18_1
-; X32-NEXT: # BB#2: # %cond.false
+; X32-NEXT: # %bb.2: # %cond.false
; X32-NEXT: bsrl %eax, %eax
; X32-NEXT: xorl $31, %eax
; X32-NEXT: xorl $31, %eax
@@ -750,10 +750,10 @@ define i32 @ctlz_bsr_zero_test(i32 %n) {
; X32-NEXT: retl
;
; X64-LABEL: ctlz_bsr_zero_test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testl %edi, %edi
; X64-NEXT: je .LBB18_1
-; X64-NEXT: # BB#2: # %cond.false
+; X64-NEXT: # %bb.2: # %cond.false
; X64-NEXT: bsrl %edi, %eax
; X64-NEXT: xorl $31, %eax
; X64-NEXT: xorl $31, %eax
@@ -764,13 +764,13 @@ define i32 @ctlz_bsr_zero_test(i32 %n) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_bsr_zero_test:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: lzcntl {{[0-9]+}}(%esp), %eax
; X32-CLZ-NEXT: xorl $31, %eax
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_bsr_zero_test:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: lzcntl %edi, %eax
; X64-CLZ-NEXT: xorl $31, %eax
; X64-CLZ-NEXT: retq
@@ -781,7 +781,7 @@ define i32 @ctlz_bsr_zero_test(i32 %n) {
define i8 @cttz_i8_knownbits(i8 %x) {
; X32-LABEL: cttz_i8_knownbits:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: orb $2, %al
; X32-NEXT: movzbl %al, %eax
@@ -790,7 +790,7 @@ define i8 @cttz_i8_knownbits(i8 %x) {
; X32-NEXT: retl
;
; X64-LABEL: cttz_i8_knownbits:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: orb $2, %dil
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: bsfl %eax, %eax
@@ -798,7 +798,7 @@ define i8 @cttz_i8_knownbits(i8 %x) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: cttz_i8_knownbits:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-CLZ-NEXT: orb $2, %al
; X32-CLZ-NEXT: movzbl %al, %eax
@@ -807,7 +807,7 @@ define i8 @cttz_i8_knownbits(i8 %x) {
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: cttz_i8_knownbits:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: orb $2, %dil
; X64-CLZ-NEXT: movzbl %dil, %eax
; X64-CLZ-NEXT: tzcntl %eax, %eax
@@ -821,7 +821,7 @@ define i8 @cttz_i8_knownbits(i8 %x) {
define i8 @ctlz_i8_knownbits(i8 %x) {
; X32-LABEL: ctlz_i8_knownbits:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: orb $64, %al
; X32-NEXT: movzbl %al, %eax
@@ -831,7 +831,7 @@ define i8 @ctlz_i8_knownbits(i8 %x) {
; X32-NEXT: retl
;
; X64-LABEL: ctlz_i8_knownbits:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: orb $64, %dil
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: bsrl %eax, %eax
@@ -840,7 +840,7 @@ define i8 @ctlz_i8_knownbits(i8 %x) {
; X64-NEXT: retq
;
; X32-CLZ-LABEL: ctlz_i8_knownbits:
-; X32-CLZ: # BB#0:
+; X32-CLZ: # %bb.0:
; X32-CLZ-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-CLZ-NEXT: orb $64, %al
; X32-CLZ-NEXT: movzbl %al, %eax
@@ -850,7 +850,7 @@ define i8 @ctlz_i8_knownbits(i8 %x) {
; X32-CLZ-NEXT: retl
;
; X64-CLZ-LABEL: ctlz_i8_knownbits:
-; X64-CLZ: # BB#0:
+; X64-CLZ: # %bb.0:
; X64-CLZ-NEXT: orb $64, %dil
; X64-CLZ-NEXT: movzbl %dil, %eax
; X64-CLZ-NEXT: lzcntl %eax, %eax
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