diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/bitcast-setcc-512.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/bitcast-setcc-512.ll | 774 |
1 files changed, 16 insertions, 758 deletions
diff --git a/llvm/test/CodeGen/X86/bitcast-setcc-512.ll b/llvm/test/CodeGen/X86/bitcast-setcc-512.ll index f5cb903be05..743172a6f47 100644 --- a/llvm/test/CodeGen/X86/bitcast-setcc-512.ll +++ b/llvm/test/CodeGen/X86/bitcast-setcc-512.ll @@ -204,253 +204,17 @@ define i16 @v16f32(<16 x float> %a, <16 x float> %b) { define i64 @v64i8(<64 x i8> %a, <64 x i8> %b) { ; SSE-LABEL: v64i8: ; SSE: # %bb.0: -; SSE-NEXT: pcmpgtb %xmm5, %xmm1 -; SSE-NEXT: pextrb $1, %xmm1, %eax -; SSE-NEXT: andl $1, %eax -; SSE-NEXT: pextrb $0, %xmm1, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rcx,%rax,2), %eax -; SSE-NEXT: pextrb $2, %xmm1, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rax,%rcx,4), %eax -; SSE-NEXT: pextrb $3, %xmm1, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rax,%rcx,8), %eax -; SSE-NEXT: pextrb $4, %xmm1, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $4, %ecx -; SSE-NEXT: orl %eax, %ecx -; SSE-NEXT: pextrb $5, %xmm1, %eax -; SSE-NEXT: andl $1, %eax -; SSE-NEXT: shll $5, %eax -; SSE-NEXT: orl %ecx, %eax -; SSE-NEXT: pextrb $6, %xmm1, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $6, %ecx -; SSE-NEXT: pextrb $7, %xmm1, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $7, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $8, %xmm1, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $8, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $9, %xmm1, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $9, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $10, %xmm1, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $10, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $11, %xmm1, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $11, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $12, %xmm1, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $12, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $13, %xmm1, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $13, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $14, %xmm1, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $14, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $15, %xmm1, %edx -; SSE-NEXT: shll $15, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: orl %eax, %edx -; SSE-NEXT: movw %dx, -{{[0-9]+}}(%rsp) ; SSE-NEXT: pcmpgtb %xmm4, %xmm0 -; SSE-NEXT: pextrb $1, %xmm0, %eax -; SSE-NEXT: andl $1, %eax -; SSE-NEXT: pextrb $0, %xmm0, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rcx,%rax,2), %eax -; SSE-NEXT: pextrb $2, %xmm0, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rax,%rcx,4), %eax -; SSE-NEXT: pextrb $3, %xmm0, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rax,%rcx,8), %eax -; SSE-NEXT: pextrb $4, %xmm0, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $4, %ecx -; SSE-NEXT: orl %eax, %ecx -; SSE-NEXT: pextrb $5, %xmm0, %eax -; SSE-NEXT: andl $1, %eax -; SSE-NEXT: shll $5, %eax -; SSE-NEXT: orl %ecx, %eax -; SSE-NEXT: pextrb $6, %xmm0, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $6, %ecx -; SSE-NEXT: pextrb $7, %xmm0, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $7, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $8, %xmm0, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $8, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $9, %xmm0, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $9, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $10, %xmm0, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $10, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $11, %xmm0, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $11, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $12, %xmm0, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $12, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $13, %xmm0, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $13, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $14, %xmm0, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $14, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $15, %xmm0, %edx -; SSE-NEXT: shll $15, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: orl %eax, %edx -; SSE-NEXT: movw %dx, -{{[0-9]+}}(%rsp) -; SSE-NEXT: pcmpgtb %xmm7, %xmm3 -; SSE-NEXT: pextrb $1, %xmm3, %eax -; SSE-NEXT: andl $1, %eax -; SSE-NEXT: pextrb $0, %xmm3, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rcx,%rax,2), %eax -; SSE-NEXT: pextrb $2, %xmm3, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rax,%rcx,4), %eax -; SSE-NEXT: pextrb $3, %xmm3, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rax,%rcx,8), %eax -; SSE-NEXT: pextrb $4, %xmm3, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $4, %ecx +; SSE-NEXT: pmovmskb %xmm0, %eax +; SSE-NEXT: pcmpgtb %xmm5, %xmm1 +; SSE-NEXT: pmovmskb %xmm1, %ecx +; SSE-NEXT: shll $16, %ecx ; SSE-NEXT: orl %eax, %ecx -; SSE-NEXT: pextrb $5, %xmm3, %eax -; SSE-NEXT: andl $1, %eax -; SSE-NEXT: shll $5, %eax -; SSE-NEXT: orl %ecx, %eax -; SSE-NEXT: pextrb $6, %xmm3, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $6, %ecx -; SSE-NEXT: pextrb $7, %xmm3, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $7, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $8, %xmm3, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $8, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $9, %xmm3, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $9, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $10, %xmm3, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $10, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $11, %xmm3, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $11, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $12, %xmm3, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $12, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $13, %xmm3, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $13, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $14, %xmm3, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $14, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $15, %xmm3, %edx -; SSE-NEXT: shll $15, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: orl %eax, %edx -; SSE-NEXT: movw %dx, -{{[0-9]+}}(%rsp) ; SSE-NEXT: pcmpgtb %xmm6, %xmm2 -; SSE-NEXT: pextrb $1, %xmm2, %eax -; SSE-NEXT: andl $1, %eax -; SSE-NEXT: pextrb $0, %xmm2, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rcx,%rax,2), %eax -; SSE-NEXT: pextrb $2, %xmm2, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rax,%rcx,4), %eax -; SSE-NEXT: pextrb $3, %xmm2, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: leal (%rax,%rcx,8), %eax -; SSE-NEXT: pextrb $4, %xmm2, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $4, %ecx -; SSE-NEXT: orl %eax, %ecx -; SSE-NEXT: pextrb $5, %xmm2, %eax -; SSE-NEXT: andl $1, %eax -; SSE-NEXT: shll $5, %eax -; SSE-NEXT: orl %ecx, %eax -; SSE-NEXT: pextrb $6, %xmm2, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $6, %ecx -; SSE-NEXT: pextrb $7, %xmm2, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $7, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $8, %xmm2, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $8, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $9, %xmm2, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $9, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $10, %xmm2, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $10, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $11, %xmm2, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $11, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $12, %xmm2, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $12, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $13, %xmm2, %edx -; SSE-NEXT: andl $1, %edx -; SSE-NEXT: shll $13, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: pextrb $14, %xmm2, %ecx -; SSE-NEXT: andl $1, %ecx -; SSE-NEXT: shll $14, %ecx -; SSE-NEXT: orl %edx, %ecx -; SSE-NEXT: pextrb $15, %xmm2, %edx -; SSE-NEXT: shll $15, %edx -; SSE-NEXT: orl %ecx, %edx -; SSE-NEXT: orl %eax, %edx -; SSE-NEXT: movw %dx, -{{[0-9]+}}(%rsp) -; SSE-NEXT: movl -{{[0-9]+}}(%rsp), %eax +; SSE-NEXT: pmovmskb %xmm2, %edx +; SSE-NEXT: pcmpgtb %xmm7, %xmm3 +; SSE-NEXT: pmovmskb %xmm3, %eax ; SSE-NEXT: shll $16, %eax -; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx -; SSE-NEXT: orl %eax, %ecx -; SSE-NEXT: movl -{{[0-9]+}}(%rsp), %edx -; SSE-NEXT: shll $16, %edx -; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; SSE-NEXT: orl %edx, %eax ; SSE-NEXT: shlq $32, %rax ; SSE-NEXT: orq %rcx, %rax @@ -458,541 +222,35 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b) { ; ; AVX1-LABEL: v64i8: ; AVX1: # %bb.0: -; AVX1-NEXT: pushq %rbp -; AVX1-NEXT: .cfi_def_cfa_offset 16 -; AVX1-NEXT: .cfi_offset %rbp, -16 -; AVX1-NEXT: movq %rsp, %rbp -; AVX1-NEXT: .cfi_def_cfa_register %rbp -; AVX1-NEXT: andq $-32, %rsp -; AVX1-NEXT: subq $64, %rsp ; AVX1-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm4 -; AVX1-NEXT: vpextrb $1, %xmm4, %eax -; AVX1-NEXT: andl $1, %eax -; AVX1-NEXT: vpextrb $0, %xmm4, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: leal (%rcx,%rax,2), %eax -; AVX1-NEXT: vpextrb $2, %xmm4, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: leal (%rax,%rcx,4), %eax -; AVX1-NEXT: vpextrb $3, %xmm4, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: leal (%rax,%rcx,8), %eax -; AVX1-NEXT: vpextrb $4, %xmm4, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $4, %ecx -; AVX1-NEXT: orl %eax, %ecx -; AVX1-NEXT: vpextrb $5, %xmm4, %eax -; AVX1-NEXT: andl $1, %eax -; AVX1-NEXT: shll $5, %eax -; AVX1-NEXT: orl %ecx, %eax -; AVX1-NEXT: vpextrb $6, %xmm4, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $6, %ecx -; AVX1-NEXT: vpextrb $7, %xmm4, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $7, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $8, %xmm4, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $8, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $9, %xmm4, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $9, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $10, %xmm4, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $10, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $11, %xmm4, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $11, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $12, %xmm4, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $12, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $13, %xmm4, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $13, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $14, %xmm4, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $14, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $15, %xmm4, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $15, %edx -; AVX1-NEXT: orl %ecx, %edx +; AVX1-NEXT: vpmovmskb %xmm4, %eax ; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX1-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0 -; AVX1-NEXT: vpextrb $0, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx +; AVX1-NEXT: vpmovmskb %xmm0, %ecx ; AVX1-NEXT: shll $16, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $1, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $17, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $2, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $18, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $3, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $19, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $4, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $20, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $5, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $21, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $6, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $22, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $7, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $23, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $8, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $24, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $9, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $25, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $10, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $26, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $11, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $27, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $12, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $28, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $13, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $29, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $14, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $30, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $15, %xmm0, %edx -; AVX1-NEXT: shll $31, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: orl %eax, %edx -; AVX1-NEXT: movl %edx, (%rsp) -; AVX1-NEXT: vpcmpgtb %xmm3, %xmm1, %xmm0 -; AVX1-NEXT: vpextrb $1, %xmm0, %eax -; AVX1-NEXT: andl $1, %eax -; AVX1-NEXT: vpextrb $0, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: leal (%rcx,%rax,2), %eax -; AVX1-NEXT: vpextrb $2, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: leal (%rax,%rcx,4), %eax -; AVX1-NEXT: vpextrb $3, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: leal (%rax,%rcx,8), %eax -; AVX1-NEXT: vpextrb $4, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $4, %ecx ; AVX1-NEXT: orl %eax, %ecx -; AVX1-NEXT: vpextrb $5, %xmm0, %eax -; AVX1-NEXT: andl $1, %eax -; AVX1-NEXT: shll $5, %eax -; AVX1-NEXT: orl %ecx, %eax -; AVX1-NEXT: vpextrb $6, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $6, %ecx -; AVX1-NEXT: vpextrb $7, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $7, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $8, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $8, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $9, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $9, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $10, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $10, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $11, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $11, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $12, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $12, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $13, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $13, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $14, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $14, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $15, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $15, %edx -; AVX1-NEXT: orl %ecx, %edx +; AVX1-NEXT: vpcmpgtb %xmm3, %xmm1, %xmm0 +; AVX1-NEXT: vpmovmskb %xmm0, %edx ; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm0 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 ; AVX1-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0 -; AVX1-NEXT: vpextrb $0, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $16, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $1, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $17, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $2, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $18, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $3, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $19, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $4, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $20, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $5, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $21, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $6, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $22, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $7, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $23, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $8, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $24, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $9, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $25, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $10, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $26, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $11, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $27, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $12, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $28, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $13, %xmm0, %edx -; AVX1-NEXT: andl $1, %edx -; AVX1-NEXT: shll $29, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: vpextrb $14, %xmm0, %ecx -; AVX1-NEXT: andl $1, %ecx -; AVX1-NEXT: shll $30, %ecx -; AVX1-NEXT: orl %edx, %ecx -; AVX1-NEXT: vpextrb $15, %xmm0, %edx -; AVX1-NEXT: shll $31, %edx -; AVX1-NEXT: orl %ecx, %edx -; AVX1-NEXT: orl %eax, %edx -; AVX1-NEXT: movl %edx, {{[0-9]+}}(%rsp) -; AVX1-NEXT: movl (%rsp), %ecx -; AVX1-NEXT: movl {{[0-9]+}}(%rsp), %eax +; AVX1-NEXT: vpmovmskb %xmm0, %eax +; AVX1-NEXT: shll $16, %eax +; AVX1-NEXT: orl %edx, %eax ; AVX1-NEXT: shlq $32, %rax ; AVX1-NEXT: orq %rcx, %rax -; AVX1-NEXT: movq %rbp, %rsp -; AVX1-NEXT: popq %rbp ; AVX1-NEXT: vzeroupper ; AVX1-NEXT: retq ; ; AVX2-LABEL: v64i8: ; AVX2: # %bb.0: -; AVX2-NEXT: pushq %rbp -; AVX2-NEXT: .cfi_def_cfa_offset 16 -; AVX2-NEXT: .cfi_offset %rbp, -16 -; AVX2-NEXT: movq %rsp, %rbp -; AVX2-NEXT: .cfi_def_cfa_register %rbp -; AVX2-NEXT: andq $-32, %rsp -; AVX2-NEXT: subq $64, %rsp ; AVX2-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0 -; AVX2-NEXT: vpextrb $1, %xmm0, %eax -; AVX2-NEXT: andl $1, %eax -; AVX2-NEXT: vpextrb $0, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: leal (%rcx,%rax,2), %eax -; AVX2-NEXT: vpextrb $2, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: leal (%rax,%rcx,4), %eax -; AVX2-NEXT: vpextrb $3, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: leal (%rax,%rcx,8), %eax -; AVX2-NEXT: vpextrb $4, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $4, %ecx -; AVX2-NEXT: orl %eax, %ecx -; AVX2-NEXT: vpextrb $5, %xmm0, %eax -; AVX2-NEXT: andl $1, %eax -; AVX2-NEXT: shll $5, %eax -; AVX2-NEXT: orl %ecx, %eax -; AVX2-NEXT: vpextrb $6, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $6, %ecx -; AVX2-NEXT: vpextrb $7, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $7, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $8, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $8, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $9, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $9, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $10, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $10, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $11, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $11, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $12, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $12, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $13, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $13, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $14, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $14, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $15, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $15, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 -; AVX2-NEXT: vpextrb $0, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $16, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $1, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $17, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $2, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $18, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $3, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $19, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $4, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $20, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $5, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $21, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $6, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $22, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $7, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $23, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $8, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $24, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $9, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $25, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $10, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $26, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $11, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $27, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $12, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $28, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $13, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $29, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $14, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $30, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $15, %xmm0, %edx -; AVX2-NEXT: shll $31, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: orl %eax, %edx -; AVX2-NEXT: movl %edx, (%rsp) +; AVX2-NEXT: vpmovmskb %ymm0, %ecx ; AVX2-NEXT: vpcmpgtb %ymm3, %ymm1, %ymm0 -; AVX2-NEXT: vpextrb $1, %xmm0, %eax -; AVX2-NEXT: andl $1, %eax -; AVX2-NEXT: vpextrb $0, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: leal (%rcx,%rax,2), %eax -; AVX2-NEXT: vpextrb $2, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: leal (%rax,%rcx,4), %eax -; AVX2-NEXT: vpextrb $3, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: leal (%rax,%rcx,8), %eax -; AVX2-NEXT: vpextrb $4, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $4, %ecx -; AVX2-NEXT: orl %eax, %ecx -; AVX2-NEXT: vpextrb $5, %xmm0, %eax -; AVX2-NEXT: andl $1, %eax -; AVX2-NEXT: shll $5, %eax -; AVX2-NEXT: orl %ecx, %eax -; AVX2-NEXT: vpextrb $6, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $6, %ecx -; AVX2-NEXT: vpextrb $7, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $7, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $8, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $8, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $9, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $9, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $10, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $10, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $11, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $11, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $12, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $12, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $13, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $13, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $14, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $14, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $15, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $15, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 -; AVX2-NEXT: vpextrb $0, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $16, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $1, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $17, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $2, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $18, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $3, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $19, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $4, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $20, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $5, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $21, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $6, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $22, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $7, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $23, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $8, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $24, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $9, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $25, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $10, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $26, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $11, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $27, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $12, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $28, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $13, %xmm0, %edx -; AVX2-NEXT: andl $1, %edx -; AVX2-NEXT: shll $29, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: vpextrb $14, %xmm0, %ecx -; AVX2-NEXT: andl $1, %ecx -; AVX2-NEXT: shll $30, %ecx -; AVX2-NEXT: orl %edx, %ecx -; AVX2-NEXT: vpextrb $15, %xmm0, %edx -; AVX2-NEXT: shll $31, %edx -; AVX2-NEXT: orl %ecx, %edx -; AVX2-NEXT: orl %eax, %edx -; AVX2-NEXT: movl %edx, {{[0-9]+}}(%rsp) -; AVX2-NEXT: movl (%rsp), %ecx -; AVX2-NEXT: movl {{[0-9]+}}(%rsp), %eax +; AVX2-NEXT: vpmovmskb %ymm0, %eax ; AVX2-NEXT: shlq $32, %rax ; AVX2-NEXT: orq %rcx, %rax -; AVX2-NEXT: movq %rbp, %rsp -; AVX2-NEXT: popq %rbp ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq ; |
