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-rwxr-xr-xllvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll49
1 files changed, 49 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll b/llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
new file mode 100755
index 00000000000..8f02695af70
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -O0 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
+
+; ModuleID = 'mask_set.c'
+source_filename = "mask_set.c"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+declare void @llvm.dbg.declare(metadata, metadata, metadata)
+
+; Function Attrs: nounwind uwtable
+declare i64 @calc_expected_mask_val(i8* %valp, i32 %el_size, i32 %length)
+; Function Attrs: nounwind uwtable
+declare i32 @check_mask16(i16 zeroext %res_mask, i16 zeroext %exp_mask, i8* %fname, i8* %input)
+
+; Function Attrs: nounwind uwtable
+define void @test_xmm(i32 %shift, i32 %mulp, <2 x i64> %a,i8* %arraydecay,i8* %fname){
+; CHECK-LABEL: test_xmm:
+; CHECK: ## BB#0:
+; CHECK: callq _calc_expected_mask_val
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: movw %dx, %r9w
+; CHECK-NEXT: movzwl %r9w, %esi
+; CHECK-NEXT: kmovw {{[0-9]+}}(%rsp), %k0 ## 2-byte Reload
+; CHECK-NEXT: kmovb %k0, %edi
+; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rdx ## 8-byte Reload
+; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rcx ## 8-byte Reload
+; CHECK-NEXT: callq _check_mask16
+ %d2 = bitcast <2 x i64> %a to <8 x i16>
+ %m2 = call i8 @llvm.x86.avx512.cvtw2mask.128(<8 x i16> %d2)
+ %conv7 = zext i8 %m2 to i16
+ %call9 = call i64 @calc_expected_mask_val(i8* %arraydecay, i32 2, i32 8)
+ %conv10 = trunc i64 %call9 to i16
+ %call12 = call i32 @check_mask16(i16 zeroext %conv7, i16 zeroext %conv10, i8* %fname, i8* %arraydecay)
+ %d3 = bitcast <2 x i64> %a to <4 x i32>
+ %m3 = call i8 @llvm.x86.avx512.cvtd2mask.128(<4 x i32> %d3)
+ %conv14 = zext i8 %m3 to i16
+ %call16 = call i64 @calc_expected_mask_val(i8* %arraydecay, i32 4, i32 4)
+ %conv17 = trunc i64 %call16 to i16
+ %call19 = call i32 @check_mask16(i16 zeroext %conv14, i16 zeroext %conv17, i8* %fname, i8* %arraydecay)
+ ret void
+}
+
+; Function Attrs: nounwind readnone
+declare i8 @llvm.x86.avx512.cvtw2mask.128(<8 x i16>)
+
+; Function Attrs: nounwind readnone
+declare i8 @llvm.x86.avx512.cvtd2mask.128(<4 x i32>)
+
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