summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll')
-rw-r--r--llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll25
1 files changed, 25 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll b/llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll
new file mode 100644
index 00000000000..f5bffb2386b
--- /dev/null
+++ b/llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: llc -mtriple=i386-apple-darwin < %s | FileCheck %s
+
+; PR30841: https://llvm.org/bugs/show_bug.cgi?id=30841
+; Demanded bits analysis must disable nsw/nuw when it makes a
+; simplification to add/sub such as in this case.
+
+define i8 @PR30841(i64 %argc) {
+; CHECK-LABEL: PR30841:
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: negl %eax
+; CHECK-NEXT: ## kill: %AL<def> %AL<kill> %EAX<kill>
+; CHECK-NEXT: retl
+;
+entry:
+ %or = or i64 %argc, -4294967296
+ br label %end
+
+end:
+ %neg = sub nuw nsw i64 -4294967296, %argc
+ %trunc = trunc i64 %neg to i8
+ ret i8 %trunc
+}
+
OpenPOWER on IntegriCloud