diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir')
| -rw-r--r-- | llvm/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir b/llvm/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir index 33ffc6e790c..77c11b12e23 100644 --- a/llvm/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir +++ b/llvm/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir @@ -1,3 +1,4 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=i386-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s --- | @@ -8,20 +9,22 @@ # Check that we select a the x86.flags.read.u32 intrinsic into a RDFLAGS # instruction. Also check that we constrain the register class of the COPY to # gr32. -# CHECK-LABEL: name: read_flags name: read_flags legalized: true regBankSelected: true -# CHECK: registers: -# CHECK-NEXT: - { id: 0, class: gr32, preferred-register: '' } registers: - { id: 0, class: gpr } -# CHECK: body: -# CHECK: %0 = RDFLAGS32 body: | bb.0: + ; CHECK-LABEL: name: read_flags + ; CHECK: registers: + ; CHECK-NEXT: id: 0, class: gr32 + ; CHECK-NEXT: id: 1, class: gr64 + ; CHECK: [[RDFLAGS32_:%[0-9]+]] = RDFLAGS32 implicit-def %esp, implicit %esp + ; CHECK: [[SUBREG_TO_REG:%[0-9]+]] = SUBREG_TO_REG 0, [[RDFLAGS32_]], 4 + ; CHECK: %rax = COPY [[SUBREG_TO_REG]] %0(s32) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.x86.flags.read.u32) %rax = COPY %0(s32) ... |
