diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/GlobalISel/select-constant.mir')
| -rw-r--r-- | llvm/test/CodeGen/X86/GlobalISel/select-constant.mir | 93 |
1 files changed, 51 insertions, 42 deletions
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-constant.mir b/llvm/test/CodeGen/X86/GlobalISel/select-constant.mir index 30f57418b4c..db6c8c984a8 100644 --- a/llvm/test/CodeGen/X86/GlobalISel/select-constant.mir +++ b/llvm/test/CodeGen/X86/GlobalISel/select-constant.mir @@ -1,3 +1,4 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --- | @@ -40,15 +41,16 @@ name: const_i8 legalized: true regBankSelected: true selected: false -# CHECK-LABEL: name: const_i8 -# CHECK: registers: -# CHECK-NEXT: - { id: 0, class: gr8, preferred-register: '' } registers: - { id: 0, class: gpr } -# CHECK: body: -# CHECK: %0 = MOV8ri 2 body: | bb.1 (%ir-block.0): + ; CHECK-LABEL: name: const_i8 + ; CHECK: registers: + ; CHECK-NEXT: id: 0, class: gr8 + ; CHECK: [[MOV8ri:%[0-9]+]] = MOV8ri 2 + ; CHECK: %al = COPY [[MOV8ri]] + ; CHECK: RET 0, implicit %al %0(s8) = G_CONSTANT i8 2 %al = COPY %0(s8) RET 0, implicit %al @@ -59,15 +61,16 @@ name: const_i16 legalized: true regBankSelected: true selected: false -# CHECK-LABEL: name: const_i16 -# CHECK: registers: -# CHECK-NEXT: - { id: 0, class: gr16, preferred-register: '' } registers: - { id: 0, class: gpr } -# CHECK: body: -# CHECK: %0 = MOV16ri 3 body: | bb.1 (%ir-block.0): + ; CHECK-LABEL: name: const_i16 + ; CHECK: registers: + ; CHECK-NEXT: id: 0, class: gr16 + ; CHECK: [[MOV16ri:%[0-9]+]] = MOV16ri 3 + ; CHECK: %ax = COPY [[MOV16ri]] + ; CHECK: RET 0, implicit %ax %0(s16) = G_CONSTANT i16 3 %ax = COPY %0(s16) RET 0, implicit %ax @@ -78,15 +81,16 @@ name: const_i32 legalized: true regBankSelected: true selected: false -# CHECK-LABEL: name: const_i32 -# CHECK: registers: -# CHECK-NEXT: - { id: 0, class: gr32, preferred-register: '' } registers: - { id: 0, class: gpr } -# CHECK: body: -# CHECK: %0 = MOV32ri 4 body: | bb.1 (%ir-block.0): + ; CHECK-LABEL: name: const_i32 + ; CHECK: registers: + ; CHECK-NEXT: id: 0, class: gr32 + ; CHECK: [[MOV32ri:%[0-9]+]] = MOV32ri 4 + ; CHECK: %eax = COPY [[MOV32ri]] + ; CHECK: RET 0, implicit %eax %0(s32) = G_CONSTANT i32 4 %eax = COPY %0(s32) RET 0, implicit %eax @@ -94,16 +98,18 @@ body: | ... --- name: const_i32_0 -# CHECK-LABEL: name: const_i32_0 legalized: true regBankSelected: true -# CHECK: registers: -# CHECK-NEXT: - { id: 0, class: gr32, preferred-register: '' } registers: - { id: 0, class: gpr } -# CHECK: %0 = MOV32r0 implicit-def %eflags body: | bb.1 (%ir-block.0): + ; CHECK-LABEL: name: const_i32_0 + ; CHECK: registers: + ; CHECK-NEXT: id: 0, class: gr32 + ; CHECK: [[MOV32r0_:%[0-9]+]] = MOV32r0 implicit-def %eflags + ; CHECK: %eax = COPY [[MOV32r0_]] + ; CHECK: RET 0, implicit %eax %0(s32) = G_CONSTANT i32 0 %eax = COPY %0(s32) RET 0, implicit %eax @@ -114,15 +120,16 @@ name: const_i64 legalized: true regBankSelected: true selected: false -# CHECK-LABEL: name: const_i64 -# CHECK: registers: -# CHECK-NEXT: - { id: 0, class: gr64, preferred-register: '' } registers: - { id: 0, class: gpr } -# CHECK: body: -# CHECK: %0 = MOV64ri 68719476720 body: | bb.1 (%ir-block.0): + ; CHECK-LABEL: name: const_i64 + ; CHECK: registers: + ; CHECK-NEXT: id: 0, class: gr64 + ; CHECK: [[MOV64ri:%[0-9]+]] = MOV64ri 68719476720 + ; CHECK: %rax = COPY [[MOV64ri]] + ; CHECK: RET 0, implicit %rax %0(s64) = G_CONSTANT i64 68719476720 %rax = COPY %0(s64) RET 0, implicit %rax @@ -134,15 +141,16 @@ alignment: 4 legalized: true regBankSelected: true selected: false -# CHECK-LABEL: name: const_i64_u32 -# CHECK: registers: -# CHECK-NEXT: - { id: 0, class: gr64, preferred-register: '' } registers: - { id: 0, class: gpr } -# CHECK: body: -# CHECK: %0 = MOV64ri32 1879048192 body: | bb.1 (%ir-block.0): + ; CHECK-LABEL: name: const_i64_u32 + ; CHECK: registers: + ; CHECK-NEXT: id: 0, class: gr64 + ; CHECK: [[MOV64ri32_:%[0-9]+]] = MOV64ri32 1879048192 + ; CHECK: %rax = COPY [[MOV64ri32_]] + ; CHECK: RET 0, implicit %rax %0(s64) = G_CONSTANT i64 1879048192 %rax = COPY %0(s64) RET 0, implicit %rax @@ -153,15 +161,16 @@ name: const_i64_i32 legalized: true regBankSelected: true selected: false -# CHECK-LABEL: name: const_i64_i32 -# CHECK: registers: -# CHECK-NEXT: - { id: 0, class: gr64, preferred-register: '' } registers: - { id: 0, class: gpr } -# CHECK: body: -# CHECK: %0 = MOV64ri32 -1 body: | bb.1 (%ir-block.0): + ; CHECK-LABEL: name: const_i64_i32 + ; CHECK: registers: + ; CHECK-NEXT: id: 0, class: gr64 + ; CHECK: [[MOV64ri32_:%[0-9]+]] = MOV64ri32 -1 + ; CHECK: %rax = COPY [[MOV64ri32_]] + ; CHECK: RET 0, implicit %rax %0(s64) = G_CONSTANT i64 -1 %rax = COPY %0(s64) RET 0, implicit %rax @@ -169,24 +178,24 @@ body: | ... --- name: main -# CHECK-LABEL: name: main alignment: 4 legalized: true regBankSelected: true -# CHECK: registers: -# CHECK-NEXT: - { id: 0, class: gr64, preferred-register: '' } -# CHECK-NEXT: - { id: 1, class: gr64, preferred-register: '' } registers: - { id: 0, class: gpr, preferred-register: '' } - { id: 1, class: gpr, preferred-register: '' } -# CHECK: %0 = COPY %rdi -# CHECK-NEXT: %1 = MOV64ri32 0 -# CHECK-NEXT: MOV64mr %0, 1, _, 0, _, %1 :: (store 8 into %ir.data) -# CHECK-NEXT: RET 0 body: | bb.1 (%ir-block.0): liveins: %rdi + ; CHECK-LABEL: name: main + ; CHECK: registers: + ; CHECK-NEXT: id: 0, class: gr64 + ; CHECK-NEXT: id: 1, class: gr64 + ; CHECK: [[COPY:%[0-9]+]] = COPY %rdi + ; CHECK: [[MOV64ri32_:%[0-9]+]] = MOV64ri32 0 + ; CHECK: MOV64mr [[COPY]], 1, _, 0, _, [[MOV64ri32_]] :: (store 8 into %ir.data) + ; CHECK: RET 0 %0(p0) = COPY %rdi %1(p0) = G_CONSTANT i64 0 G_STORE %1(p0), %0(p0) :: (store 8 into %ir.data) |
