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-rw-r--r--llvm/test/CodeGen/WebAssembly/simd.ll132
1 files changed, 132 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/simd.ll b/llvm/test/CodeGen/WebAssembly/simd.ll
index 064df0bf9fd..4d337611bc9 100644
--- a/llvm/test/CodeGen/WebAssembly/simd.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd.ll
@@ -83,6 +83,50 @@ define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
ret <16 x i8> %res
}
+; CHECK-LABEL: build_v16i8:
+; NO-SIMD128-NOT: i8x16
+; SIMD128: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i8x16.splat $push0=, $0 # encoding: [0xfd,0x03]
+; SIMD128: i8x16.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x11,0x01]
+; SIMD128: i8x16.replace_lane $push2=, $pop1, 2, $2 # encoding: [0xfd,0x11,0x02]
+; SIMD128: i8x16.replace_lane $push3=, $pop2, 3, $3 # encoding: [0xfd,0x11,0x03]
+; SIMD128: i8x16.replace_lane $push4=, $pop3, 4, $4 # encoding: [0xfd,0x11,0x04]
+; SIMD128: i8x16.replace_lane $push5=, $pop4, 5, $5 # encoding: [0xfd,0x11,0x05]
+; SIMD128: i8x16.replace_lane $push6=, $pop5, 6, $6 # encoding: [0xfd,0x11,0x06]
+; SIMD128: i8x16.replace_lane $push7=, $pop6, 7, $7 # encoding: [0xfd,0x11,0x07]
+; SIMD128: i8x16.replace_lane $push8=, $pop7, 8, $8 # encoding: [0xfd,0x11,0x08]
+; SIMD128: i8x16.replace_lane $push9=, $pop8, 9, $9 # encoding: [0xfd,0x11,0x09]
+; SIMD128: i8x16.replace_lane $push10=, $pop9, 10, $10 # encoding: [0xfd,0x11,0x0a]
+; SIMD128: i8x16.replace_lane $push11=, $pop10, 11, $11 # encoding: [0xfd,0x11,0x0b]
+; SIMD128: i8x16.replace_lane $push12=, $pop11, 12, $12 # encoding: [0xfd,0x11,0x0c]
+; SIMD128: i8x16.replace_lane $push13=, $pop12, 13, $13 # encoding: [0xfd,0x11,0x0d]
+; SIMD128: i8x16.replace_lane $push14=, $pop13, 14, $14 # encoding: [0xfd,0x11,0x0e]
+; SIMD128: i8x16.replace_lane $push15=, $pop14, 15, $15 # encoding: [0xfd,0x11,0x0f]
+; SIMD128: return $pop15 # encoding: [0x0f]
+define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3,
+ i8 %x4, i8 %x5, i8 %x6, i8 %x7,
+ i8 %x8, i8 %x9, i8 %x10, i8 %x11,
+ i8 %x12, i8 %x13, i8 %x14, i8 %x15) {
+ %t0 = insertelement <16 x i8> undef, i8 %x0, i32 0
+ %t1 = insertelement <16 x i8> %t0, i8 %x1, i32 1
+ %t2 = insertelement <16 x i8> %t1, i8 %x2, i32 2
+ %t3 = insertelement <16 x i8> %t2, i8 %x3, i32 3
+ %t4 = insertelement <16 x i8> %t3, i8 %x4, i32 4
+ %t5 = insertelement <16 x i8> %t4, i8 %x5, i32 5
+ %t6 = insertelement <16 x i8> %t5, i8 %x6, i32 6
+ %t7 = insertelement <16 x i8> %t6, i8 %x7, i32 7
+ %t8 = insertelement <16 x i8> %t7, i8 %x8, i32 8
+ %t9 = insertelement <16 x i8> %t8, i8 %x9, i32 9
+ %t10 = insertelement <16 x i8> %t9, i8 %x10, i32 10
+ %t11 = insertelement <16 x i8> %t10, i8 %x11, i32 11
+ %t12 = insertelement <16 x i8> %t11, i8 %x12, i32 12
+ %t13 = insertelement <16 x i8> %t12, i8 %x13, i32 13
+ %t14 = insertelement <16 x i8> %t13, i8 %x14, i32 14
+ %res = insertelement <16 x i8> %t14, i8 %x15, i32 15
+ ret <16 x i8> %res
+}
+
; ==============================================================================
; 8 x i16
; ==============================================================================
@@ -157,6 +201,32 @@ define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
ret <8 x i16> %res
}
+; CHECK-LABEL: build_v8i16:
+; NO-SIMD128-NOT: i16x8
+; SIMD128: .param i32, i32, i32, i32, i32, i32, i32, i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i16x8.splat $push0=, $0 # encoding: [0xfd,0x04]
+; SIMD128: i16x8.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x12,0x01]
+; SIMD128: i16x8.replace_lane $push2=, $pop1, 2, $2 # encoding: [0xfd,0x12,0x02]
+; SIMD128: i16x8.replace_lane $push3=, $pop2, 3, $3 # encoding: [0xfd,0x12,0x03]
+; SIMD128: i16x8.replace_lane $push4=, $pop3, 4, $4 # encoding: [0xfd,0x12,0x04]
+; SIMD128: i16x8.replace_lane $push5=, $pop4, 5, $5 # encoding: [0xfd,0x12,0x05]
+; SIMD128: i16x8.replace_lane $push6=, $pop5, 6, $6 # encoding: [0xfd,0x12,0x06]
+; SIMD128: i16x8.replace_lane $push7=, $pop6, 7, $7 # encoding: [0xfd,0x12,0x07]
+; SIMD128: return $pop7 # encoding: [0x0f]
+define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3,
+ i16 %x4, i16 %x5, i16 %x6, i16 %x7) {
+ %t0 = insertelement <8 x i16> undef, i16 %x0, i32 0
+ %t1 = insertelement <8 x i16> %t0, i16 %x1, i32 1
+ %t2 = insertelement <8 x i16> %t1, i16 %x2, i32 2
+ %t3 = insertelement <8 x i16> %t2, i16 %x3, i32 3
+ %t4 = insertelement <8 x i16> %t3, i16 %x4, i32 4
+ %t5 = insertelement <8 x i16> %t4, i16 %x5, i32 5
+ %t6 = insertelement <8 x i16> %t5, i16 %x6, i32 6
+ %res = insertelement <8 x i16> %t6, i16 %x7, i32 7
+ ret <8 x i16> %res
+}
+
; ==============================================================================
; 4 x i32
; ==============================================================================
@@ -206,6 +276,23 @@ define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
ret <4 x i32> %res
}
+; CHECK-LABEL: build_v4i32:
+; NO-SIMD128-NOT: i32x4
+; SIMD128: .param i32, i32, i32, i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32x4.splat $push0=, $0 # encoding: [0xfd,0x05]
+; SIMD128: i32x4.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x13,0x01]
+; SIMD128: i32x4.replace_lane $push2=, $pop1, 2, $2 # encoding: [0xfd,0x13,0x02]
+; SIMD128: i32x4.replace_lane $push3=, $pop2, 3, $3 # encoding: [0xfd,0x13,0x03]
+; SIMD128: return $pop3 # encoding: [0x0f]
+define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
+ %t0 = insertelement <4 x i32> undef, i32 %x0, i32 0
+ %t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1
+ %t2 = insertelement <4 x i32> %t1, i32 %x2, i32 2
+ %res = insertelement <4 x i32> %t2, i32 %x3, i32 3
+ ret <4 x i32> %res
+}
+
; ==============================================================================
; 2 x i64
; ==============================================================================
@@ -258,6 +345,20 @@ define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
ret <2 x i64> %res
}
+; CHECK-LABEL: build_v2i64:
+; NO-SIMD128-NOT: i64x2
+; SIMD128-VM-NOT: i64x2
+; SIMD128: .param i64, i64{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i64x2.splat $push0=, $0 # encoding: [0xfd,0x06]
+; SIMD128: i64x2.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x14,0x01]
+; SIMD128: return $pop1 # encoding: [0x0f]
+define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) {
+ %t0 = insertelement <2 x i64> undef, i64 %x0, i32 0
+ %res = insertelement <2 x i64> %t0, i64 %x1, i32 1
+ ret <2 x i64> %res
+}
+
; ==============================================================================
; 4 x f32
; ==============================================================================
@@ -309,6 +410,23 @@ define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
ret <4 x float> %res
}
+; CHECK-LABEL: build_v4f32:
+; NO-SIMD128-NOT: f32x4
+; SIMD128: .param f32, f32, f32, f32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: f32x4.splat $push0=, $0 # encoding: [0xfd,0x07]
+; SIMD128: f32x4.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x15,0x01]
+; SIMD128: f32x4.replace_lane $push2=, $pop1, 2, $2 # encoding: [0xfd,0x15,0x02]
+; SIMD128: f32x4.replace_lane $push3=, $pop2, 3, $3 # encoding: [0xfd,0x15,0x03]
+; SIMD128: return $pop3 # encoding: [0x0f]
+define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) {
+ %t0 = insertelement <4 x float> undef, float %x0, i32 0
+ %t1 = insertelement <4 x float> %t0, float %x1, i32 1
+ %t2 = insertelement <4 x float> %t1, float %x2, i32 2
+ %res = insertelement <4 x float> %t2, float %x3, i32 3
+ ret <4 x float> %res
+}
+
; ==============================================================================
; 2 x f64
; ==============================================================================
@@ -359,3 +477,17 @@ define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
%res = insertelement <2 x double> %v, double %x, i32 0
ret <2 x double> %res
}
+
+; CHECK-LABEL: build_v2f64:
+; NO-SIMD128-NOT: f64x2
+; SIMD128-VM-NOT: f64x2
+; SIMD128: .param f64, f64{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: f64x2.splat $push0=, $0 # encoding: [0xfd,0x08]
+; SIMD128: f64x2.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x16,0x01]
+; SIMD128: return $pop1 # encoding: [0x0f]
+define <2 x double> @build_v2f64(double %x0, double %x1) {
+ %t0 = insertelement <2 x double> undef, double %x0, i32 0
+ %res = insertelement <2 x double> %t0, double %x1, i32 1
+ ret <2 x double> %res
+}
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