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-rw-r--r--llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll28
1 files changed, 15 insertions, 13 deletions
diff --git a/llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll b/llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll
index 70ad30aa60c..a50bd2cc94a 100644
--- a/llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll
@@ -1,11 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp %s -o 2>/dev/null - | FileCheck --check-prefix NOGATSCAT %s
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=-mve -enable-arm-maskedgatscat %s -o 2>/dev/null - | FileCheck --check-prefix NOMVE %s
define arm_aapcs_vfpcc <4 x i32> @unscaled_i32_i32(i8* %base, <4 x i32>* %offptr) {
; NOGATSCAT-LABEL: unscaled_i32_i32:
; NOGATSCAT: @ %bb.0: @ %entry
-; NOGATSCAT-NEXT: vldrw.u32 q0, [r1]
-; NOGATSCAT-NEXT: vadd.i32 q0, q0, r0
+; NOGATSCAT-NEXT: vldrw.u32 q0, [r1]
+; NOGATSCAT-NEXT: vadd.i32 q0, q0, r0
; NOGATSCAT-NEXT: vmov r0, s0
; NOGATSCAT-NEXT: vmov r3, s1
; NOGATSCAT-NEXT: vmov r1, s2
@@ -19,19 +20,20 @@ define arm_aapcs_vfpcc <4 x i32> @unscaled_i32_i32(i8* %base, <4 x i32>* %offptr
; NOGATSCAT-NEXT: vmov.32 q0[2], r1
; NOGATSCAT-NEXT: vmov.32 q0[3], r2
; NOGATSCAT-NEXT: bx lr
-
+;
; NOMVE-LABEL: unscaled_i32_i32:
; NOMVE: @ %bb.0: @ %entry
-; NOMVE-NEXT: .save {r4, lr}
-; NOMVE-NEXT: push {r4, lr}
-; NOMVE-NEXT: ldm.w r1, {r2, r3, lr}
-; NOMVE-NEXT: ldr r4, [r1, #12]
-; NOMVE-NEXT: ldr.w r12, [r0, r2]
-; NOMVE-NEXT: ldr r1, [r0, r3]
-; NOMVE-NEXT: ldr.w r2, [r0, lr]
-; NOMVE-NEXT: ldr r3, [r0, r4]
-; NOMVE-NEXT: mov r0, r12
-; NOMVE-NEXT: pop {r4, pc}
+; NOMVE-NEXT: .save {r4, lr}
+; NOMVE-NEXT: push {r4, lr}
+; NOMVE-NEXT: ldm.w r1, {r2, r3, lr}
+; NOMVE-NEXT: ldr r4, [r1, #12]
+; NOMVE-NEXT: ldr.w r12, [r0, r2]
+; NOMVE-NEXT: ldr r1, [r0, r3]
+; NOMVE-NEXT: ldr.w r2, [r0, lr]
+; NOMVE-NEXT: ldr r3, [r0, r4]
+; NOMVE-NEXT: mov r0, r12
+; NOMVE-NEXT: pop {r4, pc}
+
entry:
%offs = load <4 x i32>, <4 x i32>* %offptr, align 4
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